BUK104-50L Datasheet, PDF (8/14 Pages) NXP Semiconductors – PowerMOS transistor Logic level TOPFET

Philips Semiconductors
PowerMOS transistor
Logic level TOPFET
Product specification
BUK104-50L/S
BUK104-50LP/SP
RDS(ON) / mOhm
150
VIS / V = 4
100
50
BUK104-50L/S
5
6
7
10
0
0 2 4 6 8 10 12 14 16 18 20
ID / A
Fig.10. Typical on-state resistance, T_j = 25 ˚C.
R_DS(ON) = f(I_D); parameter V_IS; t_p = 250 µs
ID / A
50
BUK104-50L/S
40
30
20
10
0
0
2
4
6
8
10
12
VIS / V
Fig.11. Typical transfer characteristics, T_j = 25 ˚C.
I_D = f(V_IS) ; conditions: V_DS = 10 V; t_p = 250 µs
gfs / S
10
BUK104-50L/S
9
8
7
6
5
4
3
2
1
0
0
10
20
30
40
50
ID / A
Fig.12. Typical transconductance, T_j = 25 ˚C.
g_fs = f(I_D); conditions: V_DS = 10 V; t_p = 250 µs
a
1.5
Normalised RDS(ON) = f(Tj)
1.0
0.5
0
-60 -40 -20 0 20 40 60 80 100 120 140
Tj / C
Fig.13. Normalised drain-source on-state resistance.
a = R_DS(ON)/R_DS(ON)25 ˚C = f(T_j); I_D = 7.5 A; V_IS ≥ 5 V
Tj(TO) / C
230
BUK104-50L/S
220
210
200
190
BUK104-50S
180
170
BUK104-50L
160
150
0
2
4
6
8
10
VPS / V
Fig.14. Typical over temperature protection threshold
T_j(TO) = f(V_PS); conditions: V_DS > 0.1 V
PDSM%
120
100
80
60
40
20
0
-60 -40 -20 0 20 40 60 80 100 120 140
Tmb / C
Fig.15. Normalised limiting overload dissipation.
P_DSM% =100⋅P_DSM/P_DSM(25 ˚C) = f(T_mb)
January 1993
8
Rev 1.200