74HC594 Datasheet, PDF (8/10 Pages) NXP Semiconductors – 8-bit shift register with output register

Philips Semiconductors
8-bit shift register with output register
Product specification
74HC/HCT594
DC CHARACTERISTICS FOR
74HCT
For the DC characteristics, see
“74HC/HCT/HCU/HCMOS Logic
Family Specifications”.
Output capability: parallel outputs,
bus driver; serial output, standard.
I_CC category: MSI.
Note to HCT types
The value of additional quiescent
supply current (∆I_CC) for a unit load of
1 is given in the family specifications.
To determine ∆I_CC per input, multiply
this value by the unit load coefficient
shown in the following table.
INPUT
D_s
SH_R
SH_CP
ST_CP
ST_R
UNIT LOAD
COEFFICIENT
0.25
1.50
1.50
1.50
1.50
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t_r = t_f = 6 ns; C_L = 50 pF.
T_amb (°C)
TEST CONDITIONS
SYMBOL
PARAMETER
+25
−40 to +85 −40 to +125 UNIT V_CC WAVEFORMS
min. typ. max. min. max. min. max.
(V)
t_PHL/t_PLH propagation delay
SH_CP to Q₇’
− 18 32 − 40
propagation delay
− 18 32 − 40
ST_CP to Q_n
t_PHL
propagation delay
− 17 30 − 38
SH_R to Q₇’
propagation delay
− 17 30 − 38
ST_R to Q_n
t_W
shift clock pulse width 16 4 − 20 −
HIGH or LOW
storage clock pulse
width HIGH or LOW
16 4 −
20 −
shift and storage reset 16 6 −
pulse width HIGH or
LOW
20 −
t_su
set-up time D_s to SH_CP 20 4 −
25 −
− 48 ns
− 48 ns
− 45 ns
− 45 ns
24 −
ns
24 −
ns
24 −
ns
30 −
ns
4.5 Fig.7
4.5 Fig.8
4.5 Fig.11
4.5 Fig.12
4.5 Fig.7
4.5 Fig.8
4.5 Fig.11 and Fig.12
4.5 Fig.9
set-up time
20 6 − 25 −
30 −
ns 4.5 Fig.10
SH_R to ST_CP
set-up time
20 7 − 25 −
30 −
ns 4.5 Fig.8
SH_CP to ST_CP
t_h
hold time D_s to SH_CP 5
−3 −
6
−
7−
ns 4.5 Fig.9
t_rem
removal time
SH_R to SH_CP,
ST_R to ST_CP
f_max
maximum clock
frequency
SH_CP or ST_CP
10 −5 − 13 −
15 −
ns 4.5 Fig.11 and Fig.12
30 92 − 24 −
20 −
MHz 4.5 Fig.7 and Fig.8
December 1991
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