English
Language : 

74HC594 Datasheet, PDF (10/10 Pages) NXP Semiconductors – 8-bit shift register with output register
Philips Semiconductors
8-bit shift register with output register
Product specification
74HC/HCT594
handbook, halfpage
SH R INPUT
SHCP INPUT
VM (1)
tW
t rem
VM (1)
Q7' OUTPUT
t PHL
VM (1)
MBC324
(1) HC: VM = 50%; VI = GND to VCC
HCT: VM = 1.3 V; VI = GND to 3 V
Fig.11 Waveforms showing the shift reset
(SHR) pulse width, the shift reset to output
(Q7’) propagation delay and the shift reset
to shift clock (SHCP) removal time.
handbook, halfpage
STR INPUT
STCP INPUT
VM (1)
tW
t rem
VM (1)
t PHL
Q n OUTPUTS
VM (1)
(1) HC: VM = 50%; VI = GND to VCC
HCT: VM = 1.3 V; VI = GND to 3 V
MBC325 - 1
Fig.12 Waveforms showing the storage reset
(STR) pulse width, the storage reset to
outputs (Qn) propagation delay and the
storage reset to storage clock
(STCP) removal time.
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
December 1991
10