TDA8793 Datasheet, PDF (7/20 Pages) NXP Semiconductors – 8-bit, low-power, 3 V, 100 Msps Analog-to-Digital Converter ADC

Philips Semiconductors
8-bit, low-power, 3 V, 100 Msps
Analog-to-Digital Converter (ADC)
Preliminary specification
TDA8793
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
Track enable input (pin TEN); see Table 2
V_IL
LOW-level input voltage
V_IH
HIGH-level input voltage
I_IL
LOW-level input current
I_IH
HIGH-level input current
V_TEN = 0
V_TEN = V_CCD
0
−
0.8
2
−
V_CCD
−5
−
−
−
−
5
Inputs (pins INP and INN); analog input voltage referenced to AGND; V_REFIN = 1.27 V; see Table 3
V_i(p-p)
∆T_CI
V_i(os)
Z_i
C_i
I_IL
I_IH
input voltage range
(peak-to-peak value)
input voltage range drift
input offset voltage
input impedance
input capacitance
LOW-level input current
HIGH-level input current
V_i = V_INP − V_INN;
T_amb = 25 °C
output code = 127
f_INP = 50 MHz
f_INP = 50 MHz
V_INP = V_REFOUT + 0.5
V_INP = V_REFOUT − 0.5
V_INP = V_REFOUT + 0.5
V_INP = V_REFOUT − 0.5
0.90
−
−25
−
−
−1
−1
−
−
0.97 1.040
0.5
−
−
+25
90
−
2
−
−
−
−
−
−
40
−
40
Adjustable full scale range; V_REFIN = 1.2 to 1.35 V; see Fig.3
V_I(p-p)
input voltage range
(peak-to-peak value)
V_i = V_INP − V_INN;
−
1
−
T_amb = 25 °C
Voltage controlled regulator input pin V_REFIN (referenced to AGND); note 3
V_i(ref)
I_i(ref)
reference voltage
input current on pin V_REFIN
tbf
1.25 tbf
−
tbf
1.1
Outputs; ADC data outputs
V_OL
V_OH
C_L
δv/δt
LOW-level output voltage
HIGH-level output voltage
output load capacitance
slew rate
I_O = 1 mA
I_O = −0.4 mA
10% to 90%; C_L = 10 pF
−
−
V_CCO − 0.5 −
−
−
−
1.2
0.5
V_CCO
10
−
Switching characteristics; note 2; see Table 1
f_CLK(min)
f_CLK(max)
t_W(CLKH)
t_W(CLKL)
minimum clock frequency
maximum clock frequency
clock pulse width HIGH
clock pulse width LOW
track = LOW
−
−
6
100
−
−
4
−
−
4
−
−
V
V
µA
µA
V
mV/K
mV
kΩ
pF
µA
µA
µA
µA
V
V
mA
V
V
pF
V/ns
MHz
MHz
ns
ns
1999 Oct 06
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