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TDA8792 Datasheet, PDF (7/20 Pages) NXP Semiconductors – 3.3 V, 25 MHz 8-bit analog-to-digital converter ADC
Philips Semiconductors
3.3 V, 25 MHz 8-bit
analog-to-digital converter (ADC)
Product specification
TDA8792
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
Outputs
DIGITAL OUTPUTS D7 TO D0 (REFERENCED TO VSSO)
VOL
LOW level output voltage
VOH
HIGH level output voltage
IOZ
output current in 3-state mode
Switching characteristics
IO = 1 mA
IO = −1 mA
0.4 V < VO < VDDO
0
−
VDDO − 0.4 −
−10
−
0.4 V
VDDO V
+10 µA
CLOCK INPUT CLK (VDDA = 3.15 TO 3.45 V; VDDD = 3.15 TO 3.45 V); see Fig.3 and note 1
fclk(max)
fclk(min)
tCPH
tCPL
maximum clock frequency
minimum clock frequency
clock pulse width HIGH
clock pulse width LOW
25
−
−
MHz
0.5
−
−
MHz
16
−
−
ns
16
−
−
ns
Analog signal processing
LINEARITY
INL
DNL
integral non-linearity
differential non-linearity
ramp input
−
ramp input
−
BANDWIDTH (VDDA = 3.15 TO 3.45 V; VDDD = 3.15 TO 3.45 V); TAMB = 25 °C
B
analog bandwidth
full-scale sine wave;
20
note 2
small signal at mid-scale; −
Vi = ±10 LSB at
code 128; note 2
tSTLH
analog input settling time LOW-to-HIGH full-scale square wave; −
Fig.5; note 3
tSTHL
analog input settling time HIGH-to-LOW full-scale square wave; −
Fig.5; note 3
HARMONICS
h1
fundamental harmonics (full scale)
fi = 4.43 MHz
−
hall
harmonics (full scale); all components fi = 4.43 MHz
second harmonics
−
third harmonics
−
THD
total harmonic distortion
fi = 4.43 MHz
−
SIGNAL-TO-NOISE RATIO; see Figs 6 and 11; note 4
S/N
signal-to-noise ratio (full scale)
without harmonics;
−
fclk = 25 MHz;
fi = 4.43 MHz
±0.4 ±0.8 LSB
±0.3 ±0.75 LSB
30
−
35
−
MHz
MHz
8
12
ns
8
12
ns
−
0
dB
−61 −
dB
−61 −
dB
−58 −
dB
46
−
dB
1996 Feb 21
7