TDA8351 Datasheet, PDF (7/16 Pages) NXP Semiconductors – DC-coupled vertical deflection circuit

Philips Semiconductors
DC-coupled vertical deflection circuit
Product specification
TDA8351
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
Guard circuit
I_O
output current
V_O(guard)
output voltage on pin 8
allowable voltage on pin 8
not active;
−
−
V_O(guard) = 0 V
active; V_O(guard) = 3.6 V 1
−
I_O = 100 µA
4.6
−
maximum leakage
−
−
current = 10 µA;
50
µA
2.5
mA
5.5
V
40
V
Notes
1. A flyback supply voltage of >50 V up to 60 V is allowed in application. A 220 nF capacitor in series with a 22 Ω resistor
(dependent on I_O and the inductance of the coil) has to be connected between pin 7 and ground. The decoupling
capacitor of V_FB has to be connected between pin 6 and pin 3. This supply voltage line must have a resistance of
33 Ω (see application circuit Fig.6).
2. The linearity error is measured without S-correction and based on the same measurement principle as performed on
the screen. The measuring method is as follows:
Divide the output signal I₄ − I₇ (V_RM) into 22 equal parts ranging from 1 to 22 inclusive. Measure the value of two
succeeding parts called one block starting with part 2 and 3 (block 1) and ending with part 20 and 21 (block 10). Thus
part 1 and 22 are unused. The equations for linearity error for adjacent blocks (LEAB) and linearity error for not
adjacent blocks (LENAB) are given below:
LEAB = ^a----k----^–-a---a-_a--_v-⁽--^kg---⁺----¹--⁾ ; LENAB = ^a----m----^a--a-^x--_a--^–-_v---_g^a----m----ⁱ-ⁿ-
3. Referenced to V_P.
4. The V values within formulae relate to voltages at or across relative pin numbers, i.e. V_7-4/V_1-2 = voltage value across
pins 7 and 4 divided by voltage value across pins 1 and 2.
5. V_9-4 AC short-circuited.
6. Frequency response V_7-4/V_9-4 is equal to frequency response V_7-4/V_1-2.
7. At V_(ripple) = 500 mV eff; measured across R_M; f_i = 50 Hz.
1999 Sep 27
7