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TDA8351 Datasheet, PDF (6/16 Pages) NXP Semiconductors – DC-coupled vertical deflection circuit
Philips Semiconductors
DC-coupled vertical deflection circuit
Product specification
TDA8351
CHARACTERISTICS
VP = 17.5 V; Tamb = 25 °C; VFB = 45 V; fi = 50 Hz; II(sb) = 400 µA; measured in test circuit of Fig.3; unless otherwise
specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
DC supply
VP
operating supply voltage
VFB
flyback supply voltage
IP
supply current
9.0
VP
note 1
VP
no signal; no load
−
Vertical circuit
VO
LE
VO
VDF
|Ios|
|Vos|
∆VosT
output voltage swing (scan)
linearity error
output voltage swing (flyback)
VO(A) − VO(B)
forward voltage of the internal
efficiency diode (VO(A) − VFB)
output offset current
offset voltage at the input of the
feedback amplifier (VI(fb) − VO(B))
output offset voltage as a function
of temperature
Idiff = 0.6 mA (p-p);
Vdiff = 1.8 V (p-p);
IO = 3 A (p-p)
IO = 3 A (p-p); note 2
IO = 50 mA (p-p); note 2
Idiff = 0.3 mA;
IO = 1.5 A
IO = −1.5 A;
Idiff = 0.3 mA
Idiff = 0;
II(sb) = 50 to 500 µA
Idiff = 0;
II(sb) = 50 to 500 µA
Idiff = 0
19.8
−
−
−
−
−
−
−
VO(A)
DC output voltage
Idiff = 0; note 3
−
Gvo
open-loop voltage gain (V7-4/V1-2) notes 4 and 5
−
open loop voltage gain
note 4
−
(V7-4/V9-4; V1-2 = 0)
VR
voltage ratio V1-2/V9-4
−
fres
frequency response (−3 dB)
open loop; note 6
−
GI
current gain (IO/Idiff)
−
∆GcT
current gain drift as a function of
−
temperature
II(sb)
IFB
PSRR
VI(DC)
VI(CM)
Ibias
IO(CM)
signal bias current
flyback supply current
power supply ripple rejection
DC input voltage
common mode input voltage
input bias current
common mode output current
50
during scan
−
note 7
−
−
II(sb) = 0
0
II(sb) = 0
−
∆II(sb) = 300 µA (p-p); −
fi = 50 Hz; Idiff = 0
−
25
−
50
−
60
30
55
−
−
1
3
1
3
39
−
−
1.5
−
30
−
18
−
72
8.0
−
80
−
80
−
0
40
5 000
−
−
−
−
10−4
400
500
−
100
80
−
2.7
−
−
1.6
0.1
0.5
0.2
−
V
V
V
mA
V
%
%
V
V
mA
mV
µV/K
V
dB
dB
dB
Hz
K
µA
µA
dB
V
V
µA
mA
1999 Sep 27
6