TDA8350Q Datasheet, PDF(7/16 Page) NXP Semiconductors – DC-coupled vertical deflection and East-West output circuit

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TDA8350Q Datasheet, PDF (7/16 Pages) NXP Semiconductors – DC-coupled vertical deflection and East-West output circuit

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Philips Semiconductors

DC-coupled vertical deï¬ection and

East-West output circuit

Preliminary speciï¬cation

TDA8350Q

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX. UNIT

East-West ampliï¬er

VO(sink)

fres

Ibias

VI(DC)

Iset

V13-7

saturation voltage

IO(sink) = 500 mA;

II(corr) = 0 ÂµA; note 8

open loop voltage gain (V11/V12)

frequency response (â3 dB)

linearity error

VO(sink) = 3 V

VO(sink) = 10 V; note 2 â

input bias current (pin 12)

DC input voltage

offset voltage set current

maximum allowed voltage at

pin 13

2.0

2.5

4 000

0.5

ÂµA

0.3

Guard circuit

output current

not active;

VO(guard) = 0 V

ÂµA

output current

active; VO(guard) = 4.5 V 1

2.5

VO(guard) output voltage

IO = 100 ÂµA

5.5

allowable voltage on pin 10

maximum leakage

current = 10 ÂµA

Notes

1. A flyback supply voltage of >50 V up to 60 V is allowed in application. A 220 nF capacitor in series with a 22 â¦ resistor

(dependent on IO and the inductance of the coil) has to be connected between pin 7 and ground. The decoupling

capacitor of VFB has to be connected between pin 8 and pin 4. This supply voltage line must have a resistance of

33 â¦ (see application circuit Fig.5).

2. The linearity error is measured without S-correction and based on the same measurement principle as performed on

the screen. The measuring method is as follows:

Divide the output signal I5 - I9 (VRM) into 22 equal parts ranging from 1 to 22 inclusive. Measure the value of two

succeeding parts called one block starting with part 2 and 3 (block 1) and ending with part 20 and 21 (block 10). Thus

part 1 and 22 are unused. The equations for linearity error for adjacent blocks (LEAB) and not adjacent blocks (NAB)

are given below;

LEAB = a----k----â--a--a-a---v(--k-g---+---1---)- ; NAB = -a---m----a--a-x--a--â-v---ga----m----i-n-

3. Referenced to VP.

4. V values within formulae, relate to voltages at or between relative pin numbers, i.e. V9-5/V1-2 = voltage value across

pins 9 and 5 divided by voltage value across pins 1 and 2.

5. V3-5 AC short-circuited.

6. Frequency response V9-5/V3-5 is equal to frequency response V9-5/V1-2.

7. At V(ripple) = 500 mV eff; measured across RM; fi = 50 Hz.

8. The output pin 11 requires a capacitor of minimum value 68 nF.

January 1995

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