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TDA8350Q Datasheet, PDF (5/16 Pages) NXP Semiconductors – DC-coupled vertical deflection and East-West output circuit
Philips Semiconductors
DC-coupled vertical deflection and
East-West output circuit
Preliminary specification
TDA8350Q
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
MIN. MAX. UNIT
DC supply
VP
VFB
supply voltage
flyback supply voltage
non-operating
note 1
−
40
V
−
25
V
−
50
V
60
V
Vertical circuit
IO
VO(A)
output current (peak-to-peak value)
output voltage (pin 9)
note 2
note 1
−
3
A
−
52
V
62
V
Flyback switch
IM
peak output current
East-West amplifier
VO(sink)
IO(sink)
output voltage
output current
Thermal data (in accordance with IEC 747-1)
Tstg
Tamb
Tvj
Rth vj-c
Rth vj-a
tsc
storage temperature
operating ambient temperature
virtual junction temperature
resistance vj-case
resistance vj-ambient in free air
short-circuiting time
−
±1.5 A
IO(sink) = 10 µA; note 3
−
VO(sink) = 2 V; note 3
−
40
V
500
mA
note 4
−65
150
°C
−25
+75
°C
−
150
°C
−
4
K/W
−
40
K/W
−
1
hr
Notes
1. A flyback supply voltage of >50 V up to 60 V is allowed in application. A 220 nF capacitor in series with a 22 Ω resistor
(dependent on IO and the inductance of the coil) has to be connected between pin 7 and ground. The decoupling
capacitor of VFB has to be connected between pin 8 and pin 4. This supply voltage line must have a resistance of
33 Ω (see application circuit Fig.5).
2. IO maximum determined by current protection.
3. The operating area is limited by a straight line between the points VO(sink) = 40 V; IO(sink) = 10 µA and VO(sink) = 2 V;
IO(sink) = 500 mA.
4. Up to Vp = 18 V.
January 1995
5