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PSMN2R7-30BL_15 Datasheet, PDF (7/15 Pages) NXP Semiconductors – N-channel 30 V 3.0 m logic level MOSFET in D2PAK
NXP Semiconductors
PSMN2R7-30BL
N-channel 30 V 3.0 mΩ logic level MOSFET in D2PAK
Table 7. Characteristics …continued
Tested to JEDEC standards where applicable.
Symbol
Parameter
tr
rise time
td(off)
turn-off delay time
tf
fall time
Source-drain diode
Conditions
VDS = 15 V; RL = 0.5 Ω; VGS = 4.5 V;
RG(ext) = 4.7 Ω
VSD
source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C;
see Figure 17
trr
reverse recovery time IS = 25 A; dIS/dt = -100 A/µs; VGS = 0 V;
Qr
recovered charge
VDS = 15 V
Min Typ Max Unit
-
82 -
ns
-
74 -
ns
-
35 -
ns
-
0.7 1.2 V
-
40 -
ns
-
33 -
nC
8000
C
(pF)
6000
003aad410
Ciss
4000
Crss
2000
0
0
3
6
9
12
VGS (V)
180
gfs
(S)
150
120
90
60
30
0
0
003aad411
25
50
75
100
ID (A)
Fig 5. Input and reverse transfer capacitances as a
Fig 6. Forward transconductance as a function of
function of gate-source voltage; typical values
drain current; typical values
PSMN2R7-30BL
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 21 March 2012
© NXP B.V. 2012. All rights reserved.
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