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NX3DV2567_15 Datasheet, PDF (7/20 Pages) NXP Semiconductors – Low-ohmic four-pole double-throw analog switch
NXP Semiconductors
NX3DV2567
Low-ohmic four-pole double-throw analog switch
VCC
VIL or VIH S
nZ
IS
VI
nY0 1
nY1 2
switch
GND
VI = 0.3 V or VCC  0.3 V; VO = VCC  0.3 V or 0.3 V.
Fig 6. Test circuit for measuring ON-state leakage current
switch S
1
VIH
2
VIL
VO
001aam600
11.2 ON resistance
Table 8. ON resistance
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 8 to Figure 13.
Symbol Parameter Conditions
Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit
Min Typ[1] Max
Min
Max
Supply path switch
RON
ON resistance VI = GND to VCC;
ISW = 100 mA; see Figure 7
VCC = 1.8 V; VSW = 0 V, 1.8 V
-
0.5 0.75
-
VCC = 2.7 V; VSW = 0 V, 2.3 V
- 0.45 0.7
-
RON ON resistance VI = GND to VCC; ISW = 100 mA [2]
mismatch
between
VCC = 2.7 V; VSW = 0 V
-
0.1
-
-
channels
0.85 
0.8

-

Data path switches
RON
ON resistance VI = GND to VCC; ISW = 20 mA;
see Figure 7
VCC = 1.8 V; VSW = 0 V, 1.8 V
-
7.0 10.0
-
VCC = 2.7 V; VSW = 0 V, 2.3 V
-
6.0 9.5
-
RON ON resistance VI = GND to VCC; ISW = 20 mA [2]
mismatch
between
VCC = 2.7 V; VSW = 0 V
-
0.2
-
-
channels
11.0 
10.5 
-

[1] Typical values are measured at Tamb = 25 C.
[2] Measured at identical VCC, temperature and input voltage.
NX3DV2567
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 9 November 2011
© NXP B.V. 2011. All rights reserved.
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