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80C851 Datasheet, PDF (7/22 Pages) NXP Semiconductors – CMOS single-chip 8-bit microcontroller with on-chip EEPROM
Philips Semiconductors
CMOS single-chip 8-bit microcontroller
with on-chip EEPROM
Product specification
80C851/83C851
EEPROM
Communications between the CPU and the
EEPROM is accomplished via 5 special
function registers; 2 address registers (high
and low byte), 1 data register for read and
write operations, 1 control register, and 1
timer register to adapt the erase/write time to
the clock frequency. All registers can be read
and written. Figure 1 shows a block diagram
of the CPU, the EEPROM and the interface.
Register and Functional
Description
EADRH register address is F3H. The EADRL
register address is F2H.
Data Register (EDAT)
This register is required for read and write
operations and also for row/block erase. In
write mode, its contents are written to the
addressed byte (for “row erase” and “block
erase” the contents are don’t care). The write
pulse starts all operations, except read. In
read mode, EDAT contains the data of the
addressed byte. The EDAT register address
is F4H.
Address Register (EADRH, EADRL)
The lower byte contains the address of one
of the 256 bytes. The higher byte (EADRH) is
for future extensions and for addressing the
security bits (see Security Facilities). The
Timer Register (ETIM)
The timer register is required to adapt the
erase/write time to the oscillator frequency.
The user has to ensure that the erase or
write (program) time is neither too short or
too long.
Table 2. Values for the Timer Register (ETIM)
fXTAL1
VALUES FOR ETIM
2ms WRITE TIME
10ms WRITE TIME
HEX
DEC
HEX
DEC
1.0MHz
–
–
08
8
2.0MHz
02
2
13
19
3.0MHz
04
4
1D
29
4.0MHz
06
6
28
40
5.0MHz
08
8
32
50
6.0MHz
0A
10
3C
60
7.0MHz
0C
12
47
71
8.0MHz
0E
14
51
81
9.0MHz
10
16
5C
92
10.0MHz
12
18
66
102
11.0MHz
14
20
71
113
12.0MHz
16
22
7B
123
13.0MHz
18
24
14.0MHz
1A
26
15.0MHz
1C
28
16.0MHz
1E
30
.
.
24.0MHz
2C
4745
The ETIM register address is F5H. Table 2
contains the values which must be written to
the ETIM register by software for various
oscillator frequencies (the default value is
08H after RESET).
The general formula is:
2ms Write time:
Value (decimal,
to be rounded up)
+
fXTAL1 [kHz]
512
*2
10ms Write time:
Value (decimal)
+
fXTAL1 [kHz]
96
*2
Control Register (ECNTRL)
See Figure 2 for a description of this register.
The ECNTRL register address is F6H.
CPU
INTERRUPT
POWER-DOWN IDLE
RESET
CLK
SEQUENCER
8
ECNTRL
CLOCK
GENERATOR
ETIM
CONTROL
LOGIC
EEPROM
MATRIX
COLUMN 3
DECODER
5
ROW
DECODER
8
EDATA
3
EADRH
8
EADRL
1998 Jul 03
INTERNAL BUS
Figure 1. EEPROM Interface Block Diagram
7