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| 74HC_HCT3G06_15 Datasheet, PDF (7/14 Pages) NXP Semiconductors – Triple inverter with open-drain outputs | |||
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NXP Semiconductors
74HC3G06; 74HCT3G06
Triple inverter with open-drain outputs
tW
VI 90 %
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
VM
tr
tf
VM
VI
G
VCC
VO
DUT
RT
VCC
RL S1
CL
open
001aad983
Fig 7.
Test data is given in Table 10.
Definitions for test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Test circuit for measuring switching times
Table 10. Test data
Type
Input
74HC3G06
74HCT3G06
VI
GND to VCC
GND to 3 V
tr, tf
ï£ 6 ns
ï£ 6 ns
Load
CL
50 pF
50 pF
RL
1 kï
1 kï
S1 position
tPZL, tPLZ
VCC
VCC
74HC_HCT3G06
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 â 19 December 2013
© NXP B.V. 2013. All rights reserved.
7 of 14
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