74HC_HCT3G06_15 Datasheet, PDF (3/14 Pages) NXP Semiconductors – Triple inverter with open-drain outputs

NXP Semiconductors
74HC3G06; 74HCT3G06
Triple inverter with open-drain outputs
6.2 Pin description
Table 3. Pin description
Symbol
Pin
1A, 2A, 3A
1, 3, 6
GND
4
1Y, 2Y, 3Y
7, 5, 2
V_CC
8
Description
data input
ground (0 V)
data output
supply voltage
7. Functional description
Table 4. Function table^[1]
Input nA
L
H
Output nY
Z
L
[1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max
Unit
V_CC
supply voltage
I_IK
input clamping current
I_OK
output clamping current
V_O
output voltage
V_I < 0.5 V or V_I > V_CC + 0.5 V
V_O < 0.5 V
active mode
high-impedance mode
0.5
[1] _-
[1] _20
[1] _0.5
[1] _0.5
7.0
V
20
mA
-
mA
V_CC + 0.5 V
7.0
V
I_O
I_CC
I_GND
T_stg
P_D
output current
supply current
ground current
storage temperature
dynamic power dissipation
V_O = 0.5 V to 7.0 V
T_amb = 40 C to +125 C
[1] _-
[1] _-
[1] _50
65
[2] _-
25
mA
50
mA
-
mA
+150
C
300
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For TSSOP8 package: above 55 C the value of P_tot derates linearly with 2.5 mW/K.
For VSSOP8 package: above 110 C the value of P_tot derates linearly with 8 mW/K.
For XSON8 package: above 118 C the value of P_tot derates linearly with 7.8 mW/K.
74HC_HCT3G06
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 19 December 2013
© NXP B.V. 2013. All rights reserved.
3 of 14