74HC75 Datasheet, PDF (7/7 Pages) NXP Semiconductors – Quad bistable transparent latch

Philips Semiconductors
Quad bistable transparent latch
AC WAVEFORMS
Product specification
74HC/HCT75
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.6 Waveforms showing the data input (nD) to
output (nQ) propagation delays and the
output transition times.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.7 Waveforms showing the data input (nD) to
output (nQ) propagation delays and the
output transition times.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.8
Waveforms showing the latch enable input
(LE_n-n) pulse width, the latch enable input to
outputs (nQ, nQ) propagation delays and
the output transition times.
The shaded areas indicate when the input is permitted to change
for predictable output performance.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.9 Waveforms showing the data set-up and
hold times for nD input to LE_n-n input.
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
December 1990
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