74HC273 Datasheet, PDF (7/8 Pages) NXP Semiconductors – Octal D-type flip-flop with reset; positive-edge trigger

Philips Semiconductors
Octal D-type flip-flop with reset;
positive-edge trigger
AC WAVEFORMS
Product specification
74HC/HCT273
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.6 Waveforms showing the clock (CP) to output (Q_n) propagation delays, the clock pulse width output
transition times and the maximum clock pulse frequency.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.7 Waveforms showing the master reset (MR) pulse width, the master reset to output (Q_n) propagation delays
and the master reset to clock (CP) removal time.
The shaded areas indicate when the input is permitted to
change for predictable output performance.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.8 Waveforms showing the data set-up and hold times for the data input (D_n).
September 1993
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