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74HC181 Datasheet, PDF (7/20 Pages) NXP Semiconductors – 4-bit arithmetic logic unit
Philips Semiconductors
4-bit arithmetic logic unit
Product specification
74HC/HCT181
Table 1 SUM MODE TEST
Function inputs S0 = S3 = 4.5 V, M = S1 = S2 = 0 V
INPUT OTHER INPUT, SAME BIT
PARAMETER UNDER
TEST
Apply 4.5 V Apply GND
OTHER DATA INPUTS
Apply 4.5 V
Apply GND
OUTPUT
UNDER
TEST
tPLH/ tPHL
Ai
tPLH/ tPHL
Bi
tPLH/ tPHL
Ai
tPLH/ tPHL
Bi
tPLH/ tPHL
Ai
tPLH/ tPHL
Bi
tPLH/ tPHL
Ai
tPLH/ tPHL
Bi
tPLH/ tPHL
Cn
Bi
Ai
Bi
Ai
none
none
none
none
none
none
none
none
none
Bi
Ai
Bi
Ai
none
remaining A and B
remaining A and B
none
none
remaining B
remaining B
remaining B
remaining B
all A
Cn
Cn
remaining A and B, Cn
remaining A and B, Cn
remaining A, Cn
remaining A, Cn
remaining A, Cn
remaining A, Cn
all B
Fi
Fi
P
P
G
G
Cn+4
Cn+4
any F or Cn+4
Table 2 DIFFERENTIAL MODE TEST
Function inputs S1 = S2 = 4.5 V, M = S0 = S3 = 0 V
INPUT OTHER INPUT, SAME BIT
PARAMETER UNDER
TEST
Apply 4.5 V Apply GND
OTHER DATA INPUTS
Apply 4.5 V
Apply GND
OUTPUT
UNDER
TEST
tPLH/ tPHL
Ai
tPLH/ tPHL
Bi
tPLH/ tPHL
Ai
tPLH/ tPHL
Bi
tPLH/ tPHL
Ai
tPLH/ tPHL
Bi
tPLZ/ tPZL
Ai
tPLZ/ tPZL
Bi
tPLH/ tPHL
Ai
tPLH/ tPHL
Bi
tPLH/ tPHL
Cn
none
Ai
none
Ai
Bi
none
none
Ai
Bi
none
none
Bi
none
Bi
none
none
Ai
Bi
none
none
Ai
none
remaining A
remaining A
none
none
none
none
remaining A
remaining A
none
none
all A and B
remaining B, Cn
remaining B, Cn
remaining A and B, Cn
remaining A and B, Cn
remaining A and B, Cn
remaining A and B, Cn
remaining B, Cn
remaining B, Cn
remaining A and B, Cn
remaining A and B, Cn
none
Fi
Fi
P
P
G
G
A=B
A=B
Cn+4
Cn+4
any F or Cn+4
Table 3 LOGIC MODE TEST
Function inputs M = S1 = S2 = 4.5 V, S0 = S3 = 0 V
INPUT OTHER INPUT, SAME BIT
PARAMETER UNDER
TEST
Apply 4.5 V
Apply GND
OTHER DATA INPUTS
Apply 4.5 V
Apply GND
OUTPUT
UNDER
TEST
tPLH/ tPHL
Ai
Bi
tPLH/ tPHL
Bi
Ai
none
none
none
none
remaining A and B, Cn Fi
remaining A and B, Cn Fi
1998 Jun 10
7