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74HC181 Datasheet, PDF (13/20 Pages) NXP Semiconductors – 4-bit arithmetic logic unit
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Philips Semiconductors
4-bit arithmetic logic unit
Product specification
74HC/HCT181
SYMBOL PARAMETER
tPHL/ tPLH
tPHL/ tPLH
tPHL/ tPLH
tPHL/ tPLH
tPHL/ tPLH
tPHL/ tPLH
tPHL/ tPLH
tPHL/ tPLH
tPZL/ tPLZ
tPZL/ tPLZ
tPHL/ tPLH
tPHL/ tPLH
propagation
delay
Ai to Fi
propagation
delay
Bi to Fi
propagation
delay
Ai to Fi
propagation
delay
Bi to Fi
propagation
delay
An to Cn+4
propagation
delay
Bn to Cn+4
propagation
delay
An to Cn+4
propagation
delay
Bn to Cn+4
propagation
delay
An to A=B
propagation
delay
Bn to A=B
propagation
delay
An to Fn
propagation
delay
Bn to Fn
Tamb (°C)
74HCT
+25
−40 to +85
min. typ. max. min. max.
33 57
71
33 57
71
29 54
68
33 54
68
30 53
66
31 53
66
30 55
69
34 55
69
34 60
75
35 60
75
33 56
70
33 56
70
−40 to +125
min. max.
86
86
81
81
80
80
83
83
90
90
84
84
TEST CONDITIONS
UNIT VCC MODE OTHER
(V)
ns 4.5 diff
M = S0 = S3 = 0 V;
S1 = S2 = 4.5 V;
Fig.8; Table 2
ns 4.5 diff
M = S0 = S3 = 0 V;
S1 = S2 = 4.5 V;
Fig.8; Table 2
ns 4.5 logic M = 4.5 V;
Fig.8; Table 3
ns 4.5 logic M = 4.5 V;
Fig.8; Table 3
ns 4.5 sum M = S1 = S2 = 0 V;
S0 = S3 = 4.5 V;
Fig.8; Table 1
ns 4.5 sum M = S1 = S2 = 0 V;
S0 = S3 = 4.5 V;
Fig.8; Table 1
ns 4.5 diff
M = S0 = S3 = 0 V;
S1 = S2 = 4.5 V;
Fig.10; Table 2
ns 4.5 diff
M = S0 = S3 = 0 V;
S1 = S2 = 4.5 V;
Fig.10; Table 2
ns 4.5 diff
M = S0 = S3 = 0 V;
S1 = S2 = 4.5 V;
Fig.11; Table 2
ns 4.5 diff
M = S0 = S3 = 0 V;
S1 = S2 = 4.5 V;
Fig.11; Table 2
ns 4.5 sum M = S1 = S2 = 0 V;
S0 = S3 = 4.5 V;
Fig.7; Table 1
ns 4.5 sum M = S1 = S2 = 0 V;
S0 = S3 = 4.5 V;
Fig.7; Table 1
1998 Jun 10
13
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