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PSMN4R6-60BS_15 Datasheet, PDF (6/15 Pages) NXP Semiconductors – N-channel 60 V, 4.4 mΩ standard level MOSFET in D2PAK
NXP Semiconductors
PSMN4R6-60BS
N-channel 60 V, 4.4 mΩ standard level MOSFET in D2PAK
7. Characteristics
Table 7. Characteristics
Symbol Parameter
Conditions
Static characteristics
V(BR)DSS
VGS(th)
drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = -55 °C
ID = 250 µA; VGS = 0 V; Tj = 25 °C
gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 10; see Figure 11
VGSth
gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 11
ID = 1 mA; VDS = VGS; Tj = 175 °C;
see Figure 11
IDSS
IGSS
RDSon
drain leakage current
VDS = 60 V; VGS = 0 V; Tj = 25 °C
VDS = 60 V; VGS = 0 V; Tj = 125 °C
gate leakage current
VGS = -20 V; VDS = 0 V; Tj = 25 °C
VGS = 20 V; VDS = 0 V; Tj = 25 °C
drain-source on-state resistance VGS = 10 V; ID = 25 A; Tj = 175 °C;
see Figure 12; see Figure 13
VGS = 10 V; ID = 25 A; Tj = 100 °C;
see Figure 12; see Figure 13
VGS = 10 V; ID = 25 A; Tj = 25 °C;
see Figure 13
RG
gate resistance
Dynamic characteristics
f = 1 MHz
QG(tot)
QGS
QGS(th)
total gate charge
gate-source charge
pre-threshold gate-source
charge
ID = 0 A; VDS = 0 V; VGS = 10 V
ID = 25 A; VDS = 30 V; VGS = 10 V;
see Figure 14; see Figure 15
QGS(th-pl)
post-threshold gate-source
charge
QGD
VGS(pl)
gate-drain charge
gate-source plateau voltage
ID = 25 A; VDS = 30 V; see Figure 14;
see Figure 15
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
input capacitance
output capacitance
reverse transfer capacitance
turn-on delay time
rise time
turn-off delay time
fall time
VDS = 30 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; see Figure 16
VDS = 30 V; RL = 1.2 Ω; VGS = 10 V;
RG(ext) = 4.7 Ω
Min Typ Max Unit
54 -
-
V
60 -
-
V
2
3
4
V
-
-
4.8 V
1
-
-
V
-
0.05 10 µA
-
-
200 µA
-
10
100 nA
-
10
100 nA
-
8.6 10.1 mΩ
-
5.98 7
mΩ
-
3.74 4.4 mΩ
-
0.79 -
Ω
-
63
-
nC
-
70.8 -
nC
-
19.5 -
nC
-
13.5 -
nC
-
6
-
nC
-
14.8 -
nC
-
4.3 -
V
-
4426 -
pF
-
567 -
pF
-
293 -
pF
-
26
-
ns
-
24
-
ns
-
58
-
ns
-
22
-
ns
PSMN4R6-60BS
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 March 2012
© NXP B.V. 2012. All rights reserved.
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