PRTR5V0U2X Datasheet, PDF (6/10 Pages) NXP Semiconductors – Ultra low capacitance double rail-to-rail ESD protection diode in SOT143B

Philips Semiconductors
PRTR5V0U2X
Ultra low capacitance double rail-to-rail ESD protection diode
7. Application information
Handling data rates up to 480 Mbit/s, USB 2.0 interfaces require ESD protection devices
with an extremely low line capacitance in order to avoid signal distortion.
With a capacitance of only 1 pF, the Philips PRTR5V0U2X offers IEC 61000-4-2, level 4
compliant ESD protection.
The PRTR5V0U2X integrates two ultra-low capacitance rail-to-rail ESD protection diodes
and an additional ESD protection diode in a small 4 lead SOT143B package.
The additional ESD protection diode connected between ground and V_CC prevents
charging of the supply.
To achieve the maximum ESD protection level, no additional external capacitors are
required.
USB controller
common mode
D+ ^choke
D−
V_BUS
protected IC/device
V_BUS
D+
D−
GND
006aaa485
Fig 5. Application diagram: USB 2.0
Circuit board layout and protection device placement
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the PRTR5V0U2X as close to the input terminal or connector as possible.
2. The path length between the PRTR5V0U2X and the protected line should be
minimized.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all printed-circuit board conductive loops including power and ground loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer printed-circuit
boards, use ground vias.
9397 750 15163
Product data sheet
Rev. 01 — 22 September 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
6 of 10