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BUK758R3-40E_15 Datasheet, PDF (6/13 Pages) NXP Semiconductors – N-channel TrenchMOS standard level FET
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NXP Semiconductors
BUK758R3-40E
N-channel TrenchMOS standard level FET
Symbol
Parameter
Conditions
Ciss
input capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz;
Coss
output capacitance
Tj = 25 °C; Fig. 15
Crss
reverse transfer
capacitance
td(on)
tr
turn-on delay time
rise time
VDS = 30 V; RL = 1.5 Ω; VGS = 10 V;
RG(ext) = 5 Ω
td(off)
turn-off delay time
tf
fall time
LD
internal drain
from upper edge of drain mounting
inductance
base to center of die
LS
internal source
from source lead to source bonding
inductance
pad
Source-drain diode
VSD
source-drain voltage IS = 20 A; VGS = 0 V; Tj = 25 °C; Fig. 16
trr
reverse recovery time IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V;
Qr
recovered charge
VDS = 25 V
Min Typ Max Unit
-
1300 1730 pF
-
260 312 pF
-
144 197 pF
-
11
-
ns
-
9
-
ns
-
21
-
ns
-
9
-
ns
-
2.5 -
nH
-
7.5 -
nH
-
0.86 1.2 V
-
18.6 -
ns
-
10.7 -
nC
160
003aah169
ID
VGS(V) = 20
10
7
(A)
120
6
80
5.5
20
RDSon
(mΩ)
15
10
003aah065
40
5
5
4.5
4
0
0
1
VDS(V)
2
0
0
5
10
15 VGS(V) 20
Fig. 6.
Tj = 25 °C; tp = 300 μs
Output characteristics; drain current as a
function of drain-source voltage; typical values
Fig. 7.
Drain-source on-state resistance as a function
of gate-source voltage; typical values
BUK758R3-40E
Product data sheet
All information provided in this document is subject to legal disclaimers.
11 September 2012
© NXP B.V. 2012. All rights reserved
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