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BUK6507-55C Datasheet, PDF (6/14 Pages) NXP Semiconductors – N-channel TrenchMOS logic and standard level FET
NXP Semiconductors
BUK6507-55C
N-channel TrenchMOS logic and standard level FET
6. Characteristics
Table 6. Characteristics
Symbol
Parameter
Conditions
Min Typ Max Unit
Static characteristics
V(BR)DSS
VGS(th)
drain-source breakdown
voltage
gate-source threshold voltage
ID = 250 µA; VGS = 0 V; Tj = 25 °C
ID = 250 µA; VGS = 0 V; Tj = -55 °C
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 9; see Figure 10
55 -
-
V
50 -
-
V
1.8 2.3 2.8 V
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 10
-
-
3.3 V
ID = 1 mA; VDS = VGS; Tj = 175 °C;
0.8 -
-
V
see Figure 10
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
VDS = 55 V; VGS = 0 V; Tj = 175 °C
-
-
500 µA
VDS = 55 V; VGS = 0 V; Tj = 25 °C
-
0.02 1
µA
VDS = 0 V; VGS = 20 V; Tj = 25 °C
-
2
100 nA
VDS = 0 V; VGS = -20 V; Tj = 25 °C
-
2
100 nA
VGS = 10 V; ID = 25 A; Tj = 25 °C;
see Figure 11
-
5.8 7
mΩ
VGS = 5 V; ID = 25 A; Tj = 25 °C;
see Figure 11
-
7.1 9
mΩ
VGS = 4.5 V; ID = 25 A; Tj = 25 °C;
see Figure 11
-
7.8 10.5 mΩ
VGS = 10 V; ID = 25 A; Tj = 175 °C;
-
-
15.4 mΩ
see Figure 12; see Figure 11
Dynamic characteristics
QG(tot)
total gate charge
ID = 25 A; VDS = 44 V; VGS = 5 V;
see Figure 13; see Figure 14
-
43
-
nC
QGS
QGD
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
LD
LS
gate-source charge
ID = 25 A; VDS = 44 V; VGS = 10 V;
-
see Figure 13; see Figure 14
-
gate-drain charge
-
input capacitance
output capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz;
-
Tj = 25 °C; see Figure 15
-
reverse transfer capacitance
-
turn-on delay time
rise time
VDS = 45 V; RL = 1.8 Ω; VGS = 10 V;
-
RG(ext) = 10 Ω
-
turn-off delay time
-
fall time
-
internal drain inductance
internal source inductance
from upper edge of drain mounting
-
base to centre of die ; Tj = 25 °C
from source lead to source bond pad ; -
Tj = 25 °C
82
-
nC
13.5 -
nC
19 -
nC
3870 5160 pF
381 457 pF
263 360 pF
18
-
ns
44 -
ns
165 -
ns
78
-
ns
3.5 -
nH
7.5 -
nH
BUK6507-55C
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 12 October 2010
© NXP B.V. 2010. All rights reserved.
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