74F8965 Datasheet, PDF (6/11 Pages) NXP Semiconductors – 9-Bit address/data Futurebus transceiver, ADT

Philips Semiconductors FAST Products
9-Bit address/data Futurebus transceiver, ADT
Product specification
74F8965/74F8966
FUNCTION TABLE FOR 74F8965
INPUTS
LATCH OUTPUTS
OPERATING MODE
AIn Bn* OEB0 OEB1 LS
OEA
LE
STATE An Bn
L–
H
L
H
L
X
X
input H** An to Bn bypass latch
H–
H
L
H
L
X
X
input L
L–
H
L
L
L
L
H
input H** An to Bn transparent latch
H–
H
L
L
L
L
L
input L
l
–
H
L
L
L
↑
H
input H** An to Bn latch and read
h–
H
L
L
L
↑
L
input L
––
H
L
L
H
H
H
L
H** An to Bn outputs latched and read
––
H
L
L
H
H
L
H
L (preconditioned latch)
X–
H
L
L
L
H
NC
input L An to Bn hold
XX
L
X
X
X
X
X
X
H** Disable Bn outputs
XX
X
H
H
X
X
X
X
H**
–L
L
H
H
H
X
X
H input Bn to An
–H
L
H
H
H
X
X
L input
–X
X
X
X
L
X
X
Z
X Disable An outputs
Notes to function table for 74F8965
1. H = High voltage level
2. h = High voltage level one setup time prior to the low–to–high LE transition
3. L = Low voltage level
4. l = Low voltage level one setup time prior to the low–to–high LE transition
5. NC= No change
6. X = Don’t care
7. Z = High impedance ”off’ state
8. – = Input not externally driven
9. ↑ = Low–to–high transition
10.H**= Goes to level of pullup voltage.
11. B* = Precaution should be taken to insure B inputs do not float. If they do they are equal to low state.
FUNCTION TABLE FOR 74F8966
INPUTS
AIn Bn* OEB0 OEB1 IAREQ LS
L–
H
L
L
H
H–
H
L
L
H
L–
H
L
L
L
H–
H
L
L
L
l
–
H
L
L
L
h–
H
L
L
L
––
H
L
L
L
––
H
L
L
L
X–
H
L
L
L
XX
L
X
X
X
XX
X
H
H
H
–L
L
H
H
H
–H
L
H
H
H
– Bn L
H
H
↓*
– Bn L
H
H
↓*
–X
X
X
X
X
OEA
L
L
L
L
L
L
H
H
L
X
X
H
H
H
H
L
LATCH
OUTPUTS
OPERATING MODE
LE STATE An Bn IAMC
X
X
input H** H** An to Bn bypass latch
X
X
input L
H**
L
H
input H** H** An to Bn transparent latch
L
L
input L
H**
↑
H
input H** H** An to Bn latch and read
↑
L
input L
H**
H
H
L
H** H** An to Bn outputs latched and read
H
L
H
L
H** (preconditioned latch)
H
NC input NC H** An to Bn hold
X
X
X
H** H** Disable Bn outputs
X
X
X
H** H**
X
X
H input H** Bn to An
X
X
L input H**
H
Bn
Z
Bn
L Latch Bn data idle arbitration request
H
Bn
Z
Bn H** (preconditioned latch)
X
X
Z
X
X Disable An outputs
December 19, 1990
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