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SAA7370 Datasheet, PDF (50/60 Pages) NXP Semiconductors – Digital servo processor and Compact Disc decoder CD7
Philips Semiconductors
Digital servo processor and
Compact Disc decoder (CD7)
Product specification
SAA7370
12 OPERATING CHARACTERISTICS (MICROCONTROLLER INTERFACE TIMING)
VDD = 4.75 to 5.25 V; VSS = 0 V; Tamb = 0 to +70 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
NORMAL MODE
MIN.
MAX.
LOCK-TO-DISC MODE
UNIT
MIN.
MAX.
Microcontroller interface timing (4-wire bus mode; writing to registers 0 to F; reading Q-channel subcode and
decoder status); see Figs 33 and 34; note 1
INPUTS SCL AND RAB
tCL
input LOW time
tCH
input HIGH time
tr
rise time
tf
fall time
READ MODE (CL = 20 pF)
tdRD
delay time RAB to SDA
valid
tdp
propagation delay SCL
to SDA
tdRZ
delay time RAB to SDA
high-impedance
WRITE MODE ((CL = 20 pF)
tsuD
set-up time SDA to SCL
thD
hold time SCL to SDA
tsuCR
set-up time SCL to RAB
tdWZ
delay time SDA
high-impedance to RAB
note 2
480/n + 20 −
2400/n + 20 −
ns
480/n + 20 −
2400/n + 20 −
ns
−
480/n
−
480/n
ns
−
480/n
−
480/n
ns
−
50
−
50
ns
720/n − 20 960/n + 20 720/n + 20 4800/n + 20 ns
−
50
−
50
ns
20 − 720/n
−
240/n + 20
0
−
960/n + 20
−
−
20 − 720/n −
ns
−
4800/n + 20 ns
1200/n + 20 −
ns
0
−
ns
Microcontroller interface timing (4-wire bus mode; servo commands); see Figs 35 and 36
INPUTS SCL AND SILD
tL
Input LOW time
tH
Input HIGH time
tr
rise time
tf
fall time
READ MODE (CL = 20 pF)
tdLD
delay time SILD to SDA
valid
tPD
propagation delay SCL
to SDA
tdLZ
delay time SILD to SDA
high-impedance
tsCLR
thCLR
set-up time SCL to SILD
hold time SILD to SCL
710
−
710
−
ns
710
−
710
−
ns
−
240
−
240
ns
−
240
−
240
ns
−
25
−
25
ns
−
950
−
950
ns
−
50
−
50
ns
480
−
480
−
ns
830
−
830
−
ns
1998 Feb 26
50