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SAA7370 Datasheet, PDF (48/60 Pages) NXP Semiconductors – Digital servo processor and Compact Disc decoder CD7
Philips Semiconductors
Digital servo processor and
Compact Disc decoder (CD7)
Product specification
SAA7370
10 OPERATING CHARACTERISTICS (SUBCODE INTERFACE TIMING)
VDD = 4.75 to 5.25 V; VSS = 0 V; Tamb = 0 to +70 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
Subcode interface timing (single speed × n); see Fig.31; note 1
INPUT: RCK
tH
input clock HIGH time
tL
input clock LOW time
tr(i)
input clock rise time
tf(i)
input clock fall time
tdC
delay time SFSY to RCK
OUTPUT: SBSY, SFSY, SUB (CL = 20 pF)
tBcy
tBW
tFcy
tFW
tFH
tFL
tdPAC
block cycle
SBSY pulse width
frame cycle
SFSY pulse width (3-wire mode only)
SFSY HIGH time
SFSY LOW time
delay time SFSY to SUB (P data)
valid
tdAC
delay time RCK falling to SUB
thD
hold time RCK to SUB
2/n
4/n
2/n
4/n
−
−
−
−
10/n
−
6/n
µs
6/n
µs
80/n
ns
80/n
ns
20/n
µs
12.0/n 13.3/n 14.7/n ms
−
−
300/n µs
122/n 136/n 150/n µs
−
−
366/n µs
−
−
66/n
µs
−
−
84/n
µs
−
−
1/n
µs
−
−
0
µs
−
−
0.7/n
µs
Note
1. The subcode timing is directly related to the overspeed factor, n, in normal operating mode. ‘n’ is replaced by the disc
speed factor ‘d’, in the lock-to-disc mode.
1998 Feb 26
48