P8XCE560 Datasheet, PDF (50/84 Pages) NXP Semiconductors – 80C51 Central Processing Unit (CPU)

Philips Semiconductors
8-bit microcontroller
Product specification
P8xCE560
16.2.4 SECONDS TIMER
This counter provides an overflow signal every second,
when the 32 kHz oscillator is running. The overflow output
sets the interrupt flag SECINT. This interrupt can be
disabled/enabled by ENSECI. If SECINT is enabled, it is
logically ORed with INT1 (External interrupt 1).
The ‘seconds’ interrupt and INT1 therefore share the same
priority and vector. The software has to check both flags
SECINT (PLLCON.5) and IE1 (TCON.3) to distinguish
between the two interrupt sources. SECINT can only be
cleared via writing a logic 0 to this bit.
The external interrupts INT0, INT1 or the seconds interrupt
can wake-up the PLL oscillator and the microcontroller as
described in Chapter 15.3. For a wake-up via INT1 or
seconds interrupt, IE1 must be enabled and
level-sensitive.
A further function of the seconds timer is to control the
start-up timing of the microcontroller after reset or after
wake-up from Power-down.
It controls the stretching of the reset pulse to the
microcontroller and controls releasing the system clock to
the microcontroller. A RSTIN signal of 1 µs at minimum will
reset the microcontroller.
• In the even of reset or wake-up with halted 32 kHz
oscillator: from RSTIN falling edge or wake-up interrupt
it takes 560 ms at maximum for the start-up of the
32 kHz oscillator itself and the stabilization of the PLLs.
• In the event of wake-up with running 32 kHz oscillator:
from wake-up interrupt it takes about 10 ms for the
stabilization of the PLLs.
After this start-up time, the microcontroller is supplied with
the system clock and - in case of a reset - the internally
stretched reset signal overlaps about 45 µs, to guarantee
a proper initialization of the microcontroller.
For further information refer to Chapter 15.
handbook, full pagewidth
32.768 kHz
XTAL4
C1
C2
Rf
32 kHz
OCSILLATOR
PD
XTAL3
PHASE
COMPARATOR
LOOP
FILTER
CCO
PD
RUN32
RSTIN
PROGRAMMABLE
DIVIDER
SECONDS TIMER
PLLCON
system
clock
reset to
controller
'seconds'
interrupt
request
INTERNAL BUS
MBH086
Fig.19 Block diagram PLL.
1997 Aug 01
50