TDA8559 Datasheet, PDF (5/32 Pages) NXP Semiconductors – Low-voltage stereo headphone amplifier

Philips Semiconductors
Low-voltage stereo headphone amplifier
Product specification
TDA8559
Output amplifiers
The output amplifiers have a transresistance of 50 kΩ, a
bandwidth of approximately 750 kHz and a maximum
output current of 100 mA. The mid-tap output voltage
equals the voltage applied at the non-inverting pin of the
output amplifier. This pin is connected to the output of the
0.5V_P buffer. This reduces the distortion when the load is
connected between an output amplifier and the buffer
(because feedback is applied over the load).
Buffer
The buffer delivers 0.5V_P to the output with a maximum
output (sink and source) current of 200 mA (peak).
Dynamic quiescent controller
The Dynamic Quiescent Current controller (DQC) gives
the advantage of low quiescent current and low distortion.
When there are high frequencies in the output signal, the
DQC will increase the quiescent current of the two output
amplifiers and the buffer. This will reduce the cross-over
distortion that normally occurs at high frequencies and low
quiescent current. The DQC gives output currents that are
linear with the amplitude and the frequency of the output
signals. These currents control the quiescent current.
Stabilizer
The TDA8559 has a voltage supply range from
1.9 to 30 V. This range is divided over two supply voltage
pins. Pin 16 is 1.9 to 18 V (breakdown voltage of the
process); this pin is preferred for supply voltages less than
18 V. Pin 15 is used for applications where V_P is
approximately 6 to 30 V. The stabilizer output is internally
connected to the supply voltage pin 16. In the range from
6 to 18 V, the voltage drop to pin 16 is 1 V. In the range
from 18 to 30 V the stabilizer output voltage (to pin 16) is
approximately 17 V.
Input logic
The MUTE pin (pin 7) selects the mute mode of the V/I
converters. LOW (TTL/CMOS) level is mute. A voltage
between 0.5 V (low level) and 1.5 V (high level) causes a
soft mute to operate (no plops). When pin 7 is floating or
greater than 1.5 V it is in the operating condition.
The input mode pin must be connected to V_P when the
supply voltage is greater than 6 V. The input mode logic
raises the tail current of the V/I converters and enables the
two buffers to bias the inputs of the V/I converters.
Reference
This circuit supplies all currents needed in this device. With
the standby mode pin 1 (TTL/CMOS), it is possible to
switch to the standby mode and reduce the total quiescent
current to below 10 µA.
1997 Jun 27
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