SA572 Datasheet, PDF (5/12 Pages) NXP Semiconductors – Programmable analog compandor

Philips Semiconductors
Programmable analog compandor
Product specification
SA572
SA572 BASIC APPLICATIONS
Description
The SA572 consists of two linearized, temperature-compensated
gain cells (∆G), each with a full-wave rectifier and a buffer amplifier
as shown in the block diagram. The two channels share a 2.5V
common bias reference derived from the power supply but otherwise
operate independently. Because of inherent low distortion, low noise
and the capability to linearize large signals, a wide dynamic range
can be obtained. The buffer amplifiers are provided to permit control
of attack time and recovery time independent of each other.
Partitioned as shown in the block diagram, the IC allows flexibility in
the design of system levels that optimize DC shift, ripple distortion,
tracking accuracy and noise floor for a wide range of application
requirements.
Gain Cell
Figure 4 shows the circuit configuration of the gain cell. Bases of the
differential pairs Q₁-Q₂ and Q₃-Q₄ are both tied to the output and
inputs of OPA A₁. The negative feedback through Q₁ holds the V_BE
of Q₁-Q₂ and the V_BE of Q₃-Q₄ equal. The following relationship can
be derived from the transistor model equation in the forward active
region.
DV_BEQ3Q4 + D_BEQ1Q2
(V_BE = V_T I_IN IC/IS)
ǒ Ǔ ǒ Ǔ V_TI_n
1
2
I
G
)
1
2
I_O
I_S
* V_TI_n
1
2
I_G
*
1
2
I_O
I_S
where
I_IN
+
V_IN
R₁
R₁ = 6.8kΩ
I₁ = 140µA
I₂ = 280µA
ǒ Ǔ ǒ Ǔ V_TI_n
I₁ ) I_IN
I_S
* V_TI_n
I₂ * I₁ * I_IN
I_S
(2)
where
I_IN
+
V_IN
R₁
R₁ = 6.8kΩ
I₁ = 140µA
I₂ = 280µA
I_O is the differential output current of the gain cell and I_G is the gain
control current of the gain cell.
If all transistors Q₁ through Q₄ are of the same size, equation (2)
can be simplified to:
I_O
+
2
I₂
@
I_IN
@
I_G
*
1
I₂
ǒ_I2
*
2I₁^Ǔ
@
I_G
(3)
The first term of Equation 3 shows the multiplier relationship of a
linearized two quadrant transconductance amplifier. The second
term is the gain control feedthrough due to the mismatch of devices.
In the design, this has been minimized by large matched devices
and careful layout. Offset voltage is caused by the device mismatch
and it leads to even harmonic distortion. The offset voltage can be
trimmed out by feeding a current source within ±25µA into the THD
trim pin.
The residual distortion is third harmonic distortion and is caused by
gain control ripple. In a compandor system, available control of fast
attack and slow recovery improve ripple distortion significantly. At
the unity gain level of 100mV, the gain cell gives THD (total harmonic
distortion) of 0.17% typ. Output noise with no input signals is only
6µV in the audio spectrum (10Hz-20kHz). The output current I_O
must feed the virtual ground input of an operational amplifier with a
resistor from output to inverting input. The non-inverting input of the
operational amplifier has to be biased at V_REF if the output current
I_O is DC coupled.
V+
1998 Nov 03
1
2
IG
)
1
2
IO
I₁
140µA
I_O
Q₄
Q₃
A1
+
–
Q₁
Q₂
R1
6.8k
I_G
I₂
280µA
THD
TRIM
V_REF
V_IN
SR00697
Figure 4. Basic Gain Cell Schematic
5