PSMN040-200W Datasheet, PDF (5/7 Pages) NXP Semiconductors – N-channel TrenchMOS transistor

Philips Semiconductors
N-channel TrenchMOS™ transistor
Product specification
PSMN040-200W
15 ^{Gate-source voltage, VGS (V)}
14 ID = 50 A
13 _{Tj = 25 C}
12
11
10
VDD = 40 V
9
8
7
VDD = 160 V
6
5
4
3
2
1
0
0 20 40 60 80 100 120 140 160 180 200
Gate charge, QG (nC)
Fig.13. Typical turn-on gate-charge characteristics.
V_GS = f(Q_G)
Source-Drain Diode Current, IF (A)
60
55 ^{VGS = 0 V}
50
45
40
175 C
35
Tj = 25 C
30
25
20
15
10
5
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2
Source-Drain Voltage, VSDS (V)
Fig.14. Typical reverse diode current.
I_F = f(V_SDS); conditions: V_GS = 0 V; parameter T_j
Maximum Avalanche Current, IAS (A)
100
25 C
10
Tj prior to avalanche = 150 C
1
0.001
0.01
0.1
1
10
Avalanche time, tAV (ms)
Fig.15. Maximum permissible non-repetitive
avalanche current (I_AS) versus avalanche time (t_AV);
unclamped inductive load
August 1999
5
Rev 1.000