BUK9516-55A Datasheet, PDF (5/9 Pages) NXP Semiconductors – TrenchMOS transistor standard level FET

Philips Semiconductors
TrenchMOS transistor
Logic level FET
Product specification
BUK9516-55A
BUK9616-55A
VGS(TO) / V
5
max.
4
typ.
3
min.
2
BUK759-60
1
0
-100
-50
0
50
Tj / C
100
150
200
Fig.11. Gate threshold voltage.
V_GS(TO) = f(T_j); conditions: I_D = 1 mA; V_DS = V_GS
1E-01
Sub-Threshold Conduction
1E-02
1E-03
2%
typ
98%
1E-04
1E-05
1E-06
0
1
2
3
4
5
Fig.12. Sub-threshold drain current.
I_D = f(V_GS); conditions: T_j = 25 ˚C; V_DS = V_GS
Thousands / pF
6.0
5.0
4.0
3.0
Ciss
2.0
Coss
1.0
0.0
0.01
Crss
0.1
1
10
100
VDS/V
Fig.13. Typical capacitances, C_iss, C_oss, C_rss.
C = f(V_DS); conditions: V_GS = 0 V; f = 1 MHz
VGS / V
6
5
VDS= 14V
4
3
VDS= 44V
2
1
0
0
10
20
30
40
50
60
QG / nC
Fig.14. Typical turn-on gate-charge characteristics.
V_GS = f(Q_G); conditions: I_D = 50 A; parameter V_DS
120 ^{IF / A}
100
80
60
Tj / ˚C =
175
40
20
25
0
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
VSDS/V
Fig.15. Typical reverse diode current.
I_F = f(V_SDS); conditions: V_GS = 0 V; parameter T_j
WDSS%
120
110
100
90
80
70
60
50
40
30
20
10
0
20 40 60 80 100 120 140 160 180
Tmb / C
Fig.16. Normalised avalanche energy rating.
W_DSS% = f(T_mb); conditions: I_D = 75 A
May 2000
5
Rev 1.000