BUK9516-55A Datasheet, PDF (1/9 Pages) NXP Semiconductors – TrenchMOS transistor standard level FET

Philips Semiconductors
TrenchMOS transistor
Logic level FET
Product specification
BUK9516-55A
BUK9616-55A
GENERAL DESCRIPTION
N-channel enhancement mode logic
level field-effect power transistor in a
plastic envelope available in
TO220AB and SOT404 . Using
’trench’ technology which features
very low on-state resistance. It is
intended for use in automotive and
general purpose switching
applications.
PINNING
TO220AB & SOT404
PIN DESCRIPTION
1 gate
2 drain
3 source
tab/mb drain
QUICK REFERENCE DATA
SYMBOL PARAMETER
V_DS
I_D
P_tot
T_j
R_DS(ON)
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance
V_GS = 5 V
V_GS = 10 V
MAX.
55
66
138
175
16
15
PIN CONFIGURATION
mb
tab
SYMBOL
d
2
13
SOT404
BUK9616-55A
12 3
TO220AB
BUK9516-55A
g
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
V_DS
V_DGR
±V_GS
±V_GSM
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Non-repetitive gate-source voltage
-
R_GS = 20 kΩ
-
t_p≤50µS
I_D
I_D
I_DM
P_tot
T_stg, T_j
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage & operating temperature
T_mb = 25 ˚C
T_mb = 100 ˚C
T_mb = 25 ˚C
T_mb = 25 ˚C
-
THERMAL RESISTANCES
SYMBOL
R_{th j-mb}
R_{th j-a}
R_{th j-a}
PARAMETER
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient(TO220AB)
Thermal resistance junction to
ambient(SOT404)
CONDITIONS
-
in free air
Minimum footprint, FR4
board
MIN.
-
-
-
-
-
-
-
-
- 55
MAX.
55
55
10
15
66
46
263
138
175
TYP.
-
60
50
MAX.
1.1
-
-
UNIT
V
A
W
˚C
mΩ
mΩ
UNIT
V
V
V
V
A
A
A
W
˚C
UNIT
K/W
K/W
K/W
May 2000
1
Rev 1.000