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BUK583-60A Datasheet, PDF (5/8 Pages) NXP Semiconductors – PowerMOS transistor Logic level FET
Philips Semiconductors
PowerMOS transistor
Logic level FET
VGS / V
10
9
8
7
6
VDS / V =12
5
4
48
3
2
1
0
0
5
10
15
QG / nC
Fig.13. Typical turn-on gate-charge characteristics.
VGS = f(QG); conditions: ID = 3.2 A; parameter VDS
ID / A
10
9
8
7
6
5
Tj / C = 150
25
4
3
2
1
0
0
0.5
1
1.5
VGS / V
Fig.14. Typical reverse diode current.
IF = f(VSDS); conditions: VGS = 0 V; parameter Tj
Product specification
BUK583-60A
WDSS%
120
Normalised Avalanche Energy
110
100
90
80
70
60
50
40
30
20
10
0
20
40
60
80 100 120 140
Tamb/ C
Fig.15. Normalised avalanche energy rating.
WDSS% = f(Tamb); conditions: ID = 3.2 A
VGS
0
RGS
L
VDS
T.U.T.
+ VDD
-
-ID/100
R 01
shunt
Fig.16. Avalanche energy test circuit.
WDSS = 0.5 ⋅ LID2 ⋅ BVDSS/(BVDSS − VDD)
September 1995
5
Rev 1.200