74HC00 Datasheet, PDF (5/17 Pages) NXP Semiconductors – Quad 2-input NAND gate

Philips Semiconductors
Quad 2-input NAND gate
Product specification
74HC00; 74HCT00
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
V_CC
V_I
V_O
T_amb
supply voltage
input voltage
output voltage
operating ambient
temperature
t_r, t_f
input rise and fall times
CONDITIONS
74HC00
74HCT00
UNIT
MIN. TYP. MAX. MIN. TYP. MAX.
2.0 5.0 6.0 4.5 5.0 5.5 V
0
−
V_CC 0
−
V_CC V
0
−
V_CC 0
−
V_CC V
see DC and AC −40 +25 +125 −40 +25 +125 °C
characteristics per
device
V_CC = 2.0 V
V_CC = 4.5 V
V_CC = 6.0 V
−
−
1000 −
−
−
ns
−
6.0 500 −
6.0 500 ns
−
−
400 −
−
−
ns
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
V_CC
supply voltage
I_IK
input diode current
I_OK
output diode current
I_O
output source or sink
current
I_CC, I_GND
T_stg
P_tot
V_CC or GND current
storage temperature
power dissipation
CONDITIONS
V_I < −0.5 V or V_I > V_CC + 0.5 V
V_O < −0.5 V or V_O > V_CC + 0.5 V
−0.5 V < V_O < V_CC + 0.5 V
T_amb = −40 to +125 °C; note 1
MIN.
−0.5
−
−
−
MAX.
+7.0
±20
±20
±25
UNIT
V
mA
mA
mA
−
±50
mA
−65
+150
°C
−
500
mW
Note
1. For DIP14 packages: above 70 °C derate linearly with 12 mW/K.
For SO14 packages: above 70 °C derate linearly with 8 mW/K.
For SSOP14 and TSSOP14 packages: above 60 °C derate linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60 °C derate linearly with 4.5 mW/K.
2003 Jun 30
5