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| 74F74 Datasheet, PDF (5/8 Pages) NXP Semiconductors – Dual D-type flip-flop | |||
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Philips Semiconductors
Dual D-type flip-flop
Product specification
74F74
AC WAVEFORMS
For all waveforms, VM = 1.5V.
The shaded areas indicate when the input is permitted to
change for predictable output performance.
Dn
VM
VM
VM
VM
tsu(L) th(L)
tsu(H) th(H)
1/fmax
CPn
VM
VM
tw(L)
VM
tw(H)
tPLH
tPHL
Qn
VM
VM
tPHL
tPLH
Qn
VM
VM
SF01276
Waveform 1. Propagation delay for data to output, data setup
time and hold times, and clock width, and maximum clock
frequency
tw(L)
SDn VM
VM
RDn
tPLH
tw(L)
VM
VM
tPHL
Qn
VM
tPHL
VM
tPLH
Qn
VM
VM
SF00050
Waveform 2. Propagation delay for set and reset to output,
set and reset pulse width
SDn or RDn
VM
trec
CPn
VM
SF00051
Waveform 3. Recovery time for set or reset to clock
TEST CIRCUIT AND WAVEFORMS
VIN
PULSE
GENERATOR
VCC
VOUT
D.U.T.
NEGATIVE
PULSE
90%
tw
VM
10%
tTHL (tf )
VM
10%
tTLH (tr )
90%
AMP (V)
0V
RT
CL RL
Test Circuit for Totem-Pole Outputs
POSITIVE
PULSE
10%
tTLH (tr )
90%
VM
tw
tTHL (tf )
90%
VM
AMP (V)
10%
0V
DEFINITIONS:
RL = Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
CL = Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
RT = Termination resistance should be equal to ZOUT of
pulse generators.
Input Pulse Definition
family
74F
INPUT PULSE REQUIREMENTS
amplitude VM rep. rate
tw
tTLH
3.0V 1.5V 1MHz 500ns 2.5ns
tTHL
2.5ns
SF00006
1996 Mar 12
5
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