English
Language : 

74F410 Datasheet, PDF (5/5 Pages) NXP Semiconductors – Register stack 16x4 RAM 3-State output register
◁
Philips Semiconductors FAST Products
Register stack – 16×4 RAM 3-State output register
Product specification
74F410
AC WAVEFORMS
CS VM
WE VM
tsu(L)
th(L)
tsu(H)
th(H)
An
VM VM
tsu(L)
th(L)
VM
VM
VM
VM
tsu(L)
th(L)
VM
VM
tsu(H)
th(H)
VM
tsu(H)
VM
th(H)
CP
VM
VM
tw(H)
tPHL
VM
tPLH
Qn
VM
VM
Waveform 1. Read cycle timing
An,
Dn
VM
VM
VM
tsu(L)
th(L)
tsu(H)
tw(L)
CS
WE
CP
VM
VM
VM
Waveform 2. Write cycle timing
OE
VM
VM
tPZH
tPHZ
VOH -0.3V
Qn
VM
0V
Waveform 3. 3-State output enable time to high level
and output disable time from high level
OE
VM
VM
tPZL
tPLZ
Qn
VM
VOL +0.3V
Waveform 4. 3-State output enable time to low level
and output disable time from low level
VM
th(H)
VM
NOTES:
1. For all waveforms, VM = 1.5V.
2. The shaded areas indicate when the input is permitted to change for predictable output performance.
TEST CIRCUIT AND WAVEFORM
VIN
PULSE
GENERATOR
VCC
VOUT
D.U.T.
90%
tW
90%
AMP (V)
7.0V
NEGATIVE
PULSE
VM
VM
RL
10%
10%
0V
tTHL (tf )
tTLH (tr )
RT
CL RL
Test circuit for 3–state outputs
SWITCH POSITION
TEST SWITCH
tPLZ, tPZL closed
All other open
DEFINITIONS:
RL = Load resistor; see AC electrical characteristics for
value.
CL = Load capacitance includes jig and probe
capacitance; see AC electrical characteristics for
value
RT = Termination resistance should be equal to ZOUT of
pulse generators.
POSITIVE
PULSE
10%
tTLH (tr )
90%
VM
tW
tTHL (tf )
90%
VM
AMP (V)
10%
0V
Input pulse definition
INPUT PULSE REQUIREMENTS
family
amplitude VM rep. rate tW tTLH
74F
3.0V 1.5V 1MHz 500ns 2.5ns
tTHL
2.5ns
January 8, 1990
5