SAA2022 Datasheet, PDF (41/52 Pages) NXP Semiconductors – Tape formatting and error correction for the DCC system

Philips Semiconductors
Tape formatting and error
correction for the DCC system
Product specification
SAA2022
SNUM
AUX BLK
SYS BLK
01 2 3 0 1 2 3 0 1 2 3 0 1 2
1 2 30 1 23 0 12 3 01 2 3
01 2 3 0 1 2 3 0 1 2 3 0 1 2
AUX, MAIN
DATA OUTPUT
FROM TAPE
3 0 12 3 01 2 30 1 23 01
MLB415
February 1994
Fig.28 SYSINFO and AUX block delays in mode DRAR.
,,,,_,,,,,,,,,, ^SNUM
01 2 3 0 1 2 3 0 1 2 3 0 1 2
,,,, ^{AUX BLK ,,,,,,1 ,,,2,,,3,,, 0 1 2 3 0 1 2 3,,,0,,,,,,1 ,,,2,,,3,,,}
SYS BLK
3 0 12 3 01 2 30 1 23 01
,,,,,,,,, _SYSBLK*
0
0
0
0
1
1
1
1
2
2
2
2
,,,,,,,,,,,,,,,,,, ³
3
3
3
,,,, _,,,,,,,,,,,,,, ^MAINDATA
INPUT
01 2 3 0 1 2 3 0 1 2 3 0 1 2
FROM TAPE
,,,,,, ,,, _{AUX OUTPUT}
,,,,,,,,,,,, ,,,,,, ^{TO TAPE}
1 0 12 3
01
2 30 1 23 01
MLB416
Fig.29 SYSINFO and AUX block delays in mode DPAR.
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