SAA2022 Datasheet, PDF (40/52 Pages) NXP Semiconductors – Tape formatting and error correction for the DCC system

Philips Semiconductors
Tape formatting and error
correction for the DCC system
Product specification
SAA2022
SNUM
01 2 3 0 1 2 3 0 1 2 3 0 1 2
AUX BLK
1 2 30 1 23 0 12 3 01 2 3
SYS BLK
,,,,,,,,,,,,,,,,,, ^{SYS BLK*}
3 0 12 3 01 2 30 1 23 01
0
0
0
0
1
1
1
1
2
2
2
2
3
3
3
3
AUX, MAIN
DATA INPUT
FROM TAPE
01 2 3 0 1 2 3 0 1 2 3 0 1 2
MLB413
Fig.26 SYSINFO and AUX block delays in DPAP (Audio and AUX simultaneously recorded).
SNUM
01 2 3 0 1 2 3 0 1 2 3 0 1 2
AUX BLK
DEPENDS ON PHASE OF AUX WRT MAIN DATA CHANNELS
SYS BLK
,,,,,,,,,,,,,,,,,,,,,,,, ^{SYS BLK*}
3 0 12 3 01 2 30 1 23 01
0
0
0
0
1
1
1
1
2
2
2
2
3
3
3
3
AUX, MAIN
DATA INPUT _{0 1 2 3 0 1 2 3 0 1 2 3 0 1 2}
FROM TAPE
MLB414
Fig.27 SYSINFO and AUX block delays in mode DPAP (Audio and AUX recorded separately).
February 1994
40