TDA8315T Datasheet, PDF (4/16 Pages) NXP Semiconductors – Integrated NTSC decoder and sync processor

Philips Semiconductors
Integrated NTSC decoder
and sync processor
Preliminary specification
TDA8315T
PINNING
SYMBOL
TEST1⁽¹⁾
HOUT
GND1
PH1LF
DEC_BG
TEST2⁽¹⁾
VOUT
DEM_SW
DEC_DIG
CLAMP
V_P1
V_P2
CVBS/Y
DEC_FT
CHROMA
SAT
SCS
HUE
Y
−V
−U
PLL
GND2
XTAL
PIN
DESCRIPTION
1 test pin 1
2 horizontal output pulse
3 ground 1 (0 V)
4 phase 1 loop filter
5 bandgap decoupling
6 test pin 2
7 vertical output pulse
8 demodulation angle switch
9 decoupling digital supply
10 back porch clamping pulse
11 supply voltage 1 (+8 V)
12 supply voltage 2 (+8 V)
13 CVBS/Y input
14 decoupling filter tuning
15 chrominance and switch input
16 saturation control input
17 sub-carrier signal output
18 hue control input
19 Y output
20 −V output
21 −U output
22 PLL colour filter
23 ground 2 (0 V)
24 3.58 MHz crystal connection
Note
1. In the application the test pins must be connected to
ground.
handbook, halfpage
TEST1 1
24 XTAL
HOUT 2
23 GND2
GND1 3
22 PLL
PH1LF 4
21 U
BG _{DEC 5}
20 V
TEST2 6
VOUT 7
TDA8315T
19 Y
18 HUE
DEM _{SW 8}
DEC _{DIG 9}
CLAMP 10
V _{P1 11}
V _P2 12
17 SCS
16 SAT
15 CHROMA
14 ^DEC FT
13 CVBS/Y
MBE016
Fig.2 Pin configuration.
September 1994
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