TDA8043 Datasheet, PDF (4/16 Pages) NXP Semiconductors – Satellite Demodulator and Decoder SDD

Philips Semiconductors
Satellite Demodulator and Decoder (SDD)
Product specification
TDA8043
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX.
UNIT
V_DDA
V_DDD
I_DD(tot)
f_clk
r_s
α
IL
S/N
P_tot
T_stg
T_amb
T_j
analog supply voltage
digital supply voltage
total supply current
clock frequency
symbol rate
nyquist roll-off (selectable)
implementation loss
signal-to-noise ratio for locking
the SDD
total power dissipation
IC storage temperature
operating ambient temperature
operating junction temperature
3.0
3.0
V_DDD = 3.3 V; note 1 −
−
note 2
0.5
−
note 3
−
QPSK mode; note 1 2
T_amb = 70°C; note 1 −
−55
0
T_amb = 70 °C
−
3.3
3.6
3.3
3.6
390
−
−
65
−
32
35 or 50 −
0.3
−
−
−
1 285
−
−
−
1 650
+150
70
125
V
V
mA
MHz
Msymbols/s
%
dB
dB
mW
°C
°C
°C
Notes
1. These values are specified for a symbol rate of 27.5 Msymbols/s, a puncturing rate of ³â„₄ and a clock frequency of
65 MHz.
2. A range from 3 to 32 Msymbols/s can be achieved with one SAW filter. By using an internal clock divider and
reducing the external SAW filter bandwidth, symbol rates down to 0.5 Msymbols/s can be achieved by using a
65 MHz crystal clock.
3. This data was measured in a laboratory environment at a symbol rate of 27.5 Msymbols/s, a clock frequency of
65 MHz, a signal-to-noise ratio of 4.5 dB and including a tuner.
PINNING
SYMBOL PIN
I2
1
I3
2
V_SSD1
3
n.c.
4
n.c.
5
I4
6
I5
7
I6
8
Q0
9
V_DDD1
10
Q1
11
Q2
12
Q3
13
Q4
14
V_SSD2
15
Q5
16
Q6
17
I/O
DESCRIPTION
I digital I-input bit 2 (ADC bypass); note 1
I digital I-input bit 3 (ADC bypass); note 1
− digital ground 1
− not connected
− not connected
I digital I-input bit 4 (ADC bypass); note 1
I digital I-input bit 5 (ADC bypass); note 1
I digital I-input bit 6 (ADC bypass: MSB); note 1
I digital Q-input bit 0 (ADC bypass: LSB); note 1
− digital supply voltage 1
I digital Q-input bit 1 (ADC bypass); note 1
I digital Q-input bit 2 (ADC bypass); note 1
I digital Q-input bit 3 (ADC bypass); note 1
I digital Q-input bit 4 (ADC bypass); note 1
− digital ground 2
I digital Q-input bit 5 (ADC bypass); note 1
I digital Q-input bit 6 (ADC bypass: MSB); note 1
1998 Feb 13
4