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TDA4852 Datasheet, PDF (4/16 Pages) NXP Semiconductors – Horizontal and vertical deflection controller for autosync monitors
Philips Semiconductors
Horizontal and vertical deflection controller
for autosync monitors
PINNING
SYMBOL
VP
FLB
HOR
GND
VERT1
VERT2
n.c.
CLBL
HVS
VS
EW
CVA
RVA
REW
RVOS
CVOS
PLL1
RHOS
CHOS
PLL2
PIN
DESCRIPTION
1 positive supply voltage
2 horizontal flyback input
3 horizontal output
4 ground (0 V)
5 vertical output 1; negative-going sawtooth
6 vertical output 2; positive-going sawtooth
7 not connected
8 clamping/blanking pulse output
9 horizontal sync/video input
10 vertical sync input
11 E/W output (parabola to driver stage)
12 capacitor for amplitude control
13 vertical amplitude adjustment input
14 E/W amplitude adjustment input (parabola)
15 vertical oscillator resistor
16 vertical oscillator capacitor
17 PLL1 phase
18 horizontal oscillator resistor
19 horizontal oscillator capacitor
20 PLL2 phase
Preliminary specification
TDA4852
Fig.2 Pin configuration.
December 1992
4