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TDA4665 Datasheet, PDF (4/12 Pages) NXP Semiconductors – Baseband delay line
Philips Semiconductors
Baseband delay line
Product specification
TDA4665
PINNING
SYMBOL
VP2
n.c.
GND2
i.c.
SAND
n.c.
i.c.
i.c.
VP1
GND1
Vo(R−Y)
Vo(B−Y)
n.c.
Vi(B−Y)
n.c.
Vi(R−Y)
PIN
DESCRIPTION
1 +5 V supply voltage for digital part
2 not connected
3 ground for digital part (0 V)
4 internally connected
5 sandcastle pulse input
6 not connected
7 internally connected
8 internally connected
9 +5 V supply voltage for analog part
10 ground for analog part (0 V)
11 ±(R−Y) output signal
12 ±(B−Y) output signal
13 not connected
14 ±(B−Y) input signal
15 not connected
16 ±(R−Y) input signal
handbook, halfpage
VP2 1
n.c. 2
16 Vi(R−Y)
15 n.c.
GND2 3
i.c. 4
SAND 5
n.c. 6
i.c. 7
14 Vi(B−Y)
TDA4665
13 n.c.
12 Vo(B−Y)
11 Vo(R−Y)
10 GND1
i.c. 8
9 VP1
MED849
Fig.2 Pin configuration.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134). Ground pins 3 and 10 connected together.
SYMBOL
PARAMETER
VP1
VP2
V5
Vn
Tstg
Tamb
VESD
analog supply voltage (pin 9)
digital supply voltage (pin 1)
voltage on pin 5
voltage on pins 11, 12, 14 and 16
storage temperature
operating ambient temperature
electrostatic handling for all pins; note 1
MIN.
−0.5
−0.5
−0.5
−0.5
−25
0
−
MAX.
+7
+7
VP + 1.0
VP
+150
70
±500
UNIT
V
V
V
V
°C
°C
V
Note
1. Equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor.
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
Rth j-a
thermal resistance from junction to ambient in free air
SOT38-4
SOT109-1
VALUE
75
220
UNIT
K/W
K/W
1996 Dec 17
4