PSMN010-55D Datasheet, PDF (4/9 Pages) NXP Semiconductors – N-channel logic level TrenchMOSÔ transistor

Philips Semiconductors
N-channel logic level TrenchMOS™ transistor
Product specification
PSMN010-55D
Normalised Power Derating, PD (%)
100
90
80
70
60
50
40
30
20
10
0
0
25
50
75
100
125
150
175
Mounting Base temperature, Tmb (C)
Fig.1. Normalised power dissipation.
PD% = 100⋅P_D/P_{D 25 ˚C} = f(T_mb)
Normalised Current Derating, ID (%)
100
90
80
70
60
50
40
30
20
10
0
0
25
50
75
100 125 150 175
Mounting Base temperature, Tmb (C)
Fig.2. Normalised continuous drain current.
ID% = 100⋅I_D/I_{D 25 ˚C} = f(T_mb); conditions: V_GS ≥ 5 V
1000 ^{Peak Pulsed Drain Current, IDM (A)}
RDS(on) = VDS/ ID
tp = 10 us
100
100 us
10
D.C.
1 ms
10 ms
100 ms
1
1
10
100
1000
Drain-Source Voltage, VDS (V)
Fig.3. Safe operating area. T_mb = 25 ˚C
I_D & I_DM = f(V_DS); I_DM single pulse; parameter t_p
10 ^{Transient thermal impedance, Zth j-mb (K/W)}
1
D = 0.5
0.2
0.1
0.1 _0.05
0.02
0.01
single pulse
PD _tp D = tp/T
T
0.001
1E-06
1E-05
1E-04
1E-03
1E-02
1E-01 1E+00
Pulse width, tp (s)
Fig.4. Transient thermal impedance.
Z_{th j-mb} = f(t); parameter D = t_p/T
50 ^{Drain Current, ID (A)}
45 ^{VGS = 10V 5 V}
3V
2.8 V
40
35
Tj = 25 C
2.6 V
30
25
20
2.4 V
15
10
2.2 V
5
2V
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
Drain-Source Voltage, VDS (V)
Fig.5. Typical output characteristics, T_j = 25 ˚C.
I_D = f(V_DS)
Drain-Source On Resistance, RDS(on) (Ohms)
0.05
2.2 V
0.045
2.4 V
2.6 V
0.04
Tj = 25 C
2.8 V
0.035
0.03
0.025
0.02
0.015
0.01
0.005
3V
5V
VGS = 10V
0
0 5 10 15 20 25 30 35 40 45 50
Drain Current, ID (A)
Fig.6. Typical on-state resistance, T_j = 25 ˚C.
R_DS(ON) = f(I_D)
October 1999
4
Rev 1.200