PHT11N06T Datasheet, PDF (4/10 Pages) NXP Semiconductors – TrenchMOS transistor Standard level FET

Philips Semiconductors
TrenchMOS™ transistor
Standard level FET
Product specification
PHT11N06T
120 ^PD%
Normalised Power Derating
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Tmb / C
Fig.1. Normalised power dissipation.
PD% = 100⋅P_D/P_{D 25 ˚C} = f(T_sp)
ID%
120
110
100
90
Normalised Current Derating
80
70
60
50
40
30
20
10
0
0
20 40 60 80 100 120 140
Tmb / C
Fig.2. Normalised continuous drain current.
ID% = 100⋅I_D/I_{D 25 ˚C} = f(T_sp); conditions: V_GS ≥ 10 V
100
ID/A
RDS(ON) = VDS/ID
10
DC
1
BUKX840-55
tp =
1 us
10 us
100 us
1 ms
10 ms
100 ms
0.10.1
1 _VDS/V 10
55
Fig.3. Safe operating area. T_sp = 25 ˚C
I_D & I_DM = f(V_DS); I_DM single pulse; parameter t_p
Zth / (K/W)
1E+02
BUK9840-55
3E+01
1E+01
0.5
3E+00 0.2
0.1
1E+00 _0.05
3E-01 0.02
1E-01
P_D
tp
D
=
tp
T
3E-02
0
1E-02
1E-07
1E-05
1E-03
t/s
T
1E-01
t
1E+01
Fig.4. Transient thermal impedance.
Z_{th j-sp} = f(t); parameter D = t_p/T
20 ₁₆
ID/A
8.0
VGS/V =
6.0
6.5
15 ¹⁰
5.5
10
5.0
5
4.5
4.0
0
0
2
4
6
8
10
Fig.5. Typical output characteristics, T_j = 25 ˚C.
I_D = f(V_DS); parameter V_GS
80 ^RDS(ON)/mOhm
VGS/V =
5.5
70
60
50
40
30
6
6.5
7
8
10
20
10
0
0
Fig.6.
5
10 _ID/A 15
20
25
Typical on-state resistance, T_j = 25 ˚C.
R_DS(ON) = f(I_D); parameter V_GS
December 1997
4
Rev 1.100