PHP3055L Datasheet, PDF (4/7 Pages) NXP Semiconductors – PowerMOS transistor Logic level FET

Philips Semiconductors
PowerMOS transistor
Logic level FET
15 ^{ID, Drain current (Amps)}
VDS = 30 V
Tj = 25 C
PHP3055L
Tj = 175 C
10
5
0
0
2
4
6
8
10
VGS, Gate-source voltage (Volts)
Fig.7. Typical transfer characteristics.
I_D = f(V_GS); parameter T_j
5 ^{gfs, Transconductance (S)}
VDD = 30 V
4
3
PHP3055L
Tj = 25 C
Tj = 175 C
2
1
0
0
5
10
15
ID, Drain current (Amps)
Fig.8. Typical transconductance.
g_fs = f(I_D); parameter T_j
a
2.0
Normalised RDS(ON) = f(Tj)
1.5
1.0
0.5
0
-60
-20
20
60
100
140
180
Tj / C
Fig.9. Normalised drain-source on-state resistance.
a = R_DS(ON)/R_{DS(ON)25 ˚C} = f(T_j); I_D = 10 A; V_GS = 10 V
Product specification
PHP3055L
VGS(TO) / V
2
1
max.
typ.
min.
0
-60
-20
20
60
100
140
180
Tj / C
Fig.10. Gate threshold voltage.
V_GS(TO) = f(T_j); conditions: I_D = 0.25 mA; V_DS = V_GS
ID / A
1E-01
SUB-THRESHOLD CONDUCTION
1E-02
1E-03
2%
typ
98 %
1E-04
1E-05
1E-06
0
0.4
0.8
1.2
1.6
2
2.4
VGS / V
Fig.11. Sub-threshold drain current.
I_D = f(V_GS); conditions: T_j = 25 ˚C; V_DS = V_GS
Ciss, Coss, Crss, Junction capacitances (pF) _PHP3055L
1000
Ciss
Coss
100
Crss
10
1
10
100
VDS, Drain-source voltage (Volts)
Fig.12. Typical capacitances, C_iss, C_oss, C_rss.
C = f(V_DS); conditions: V_GS = 0 V; f = 1 MHz
April 1998
4
Rev 1.000