PHP125N06T Datasheet, PDF (4/8 Pages) NXP Semiconductors – TrenchMOS transistor Standard level FET

Philips Semiconductors
TrenchMOS™ transistor
Standard level FET
Product specification
PHP125N06T
120 ^PD%
Normalised Power Derating
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140 160 180
Tmb / C
Fig.1. Normalised power dissipation.
PD% = 100⋅P_D/P_{D 25 ˚C} = f(T_mb)
ID (A)
150
Current Derating
125
Limited by package
100
75
50
25
0
0 20 40 60 80 100 120 140 160 180
Tmb / C
Fig.2. Normalised continuous drain current.
ID% = 100⋅I_D/I_{D 25 ˚C} = f(T_mb); conditions: V_GS ≥ 5 V
1000
ID / A
RDS(ON) = VDS/ID
100
DC
10
BUKX508-55
tp = 10 us
100 us
1 ms
10 ms
100 ms
1
1
10
VDS / V ¹⁰⁰
Fig.3. Safe operating area. T_mb = 25 ˚C
I_D & I_DM = f(V_DS); I_DM single pulse; parameter t_p
Zth / (K/W)
1E+00
0.5
1E-01
0.2
0.1
0.05
1E-02 ^0.02
P_D
tp
D
=
tp
T
0
T
t
1E-03
1E-07
1E-05
1E-03
t/s
1E-01
1E+01
Fig.4. Transient thermal impedance.
Z_{th j-mb} = f(t); parameter D = t_p/T
100
16 6.5
ID/A
10
80
VGS/V =
6.0
60
5.5
40
5.0
20
4.5
4.0
0
0
2
4 _VDS/V 6
8
10
Fig.5. Typical output characteristics, T_j = 25 ˚C.
I_D = f(V_DS); parameter V_GS
RDS(ON)/mOhm
15
5.5
VGS/V=
10
5
BUK7508-55
6
6.5
7
8
10
0
0
20
40
60
80
100
120
ID/A
Fig.6. Typical on-state resistance, T_j = 25 ˚C.
R_DS(ON) = f(I_D); parameter V_GS
December 1997
4
Rev 1.100