GTL2000_03 Datasheet, PDF (4/13 Pages) NXP Semiconductors – 22-bit bi-directional low voltage translator

Philips Semiconductors
22-bit bi-directional low voltage translator
Product data
GTL2000
APPLICATIONS
Bi-directional translation
For the bi-directional clamping configuration, higher voltage to lower voltage or lower voltage to higher voltage, the G_REF input must be
connected to D_REF and both pins pulled to high side V_CC through a pull-up resistor (typically 200 kΩ). A filter capacitor on D_REF is
recommended. The processor output can be totem pole or open drain (pull up resistors may be required) and the chipset output can be totem
pole or open drain (pull up resistors are required to pull the Dn outputs to V_CC). However, if either output is totem pole, data must be
uni-directional or the outputs must be 3-statable and the outputs must be controlled by some direction control mechanism to prevent high to low
contentions in either direction. If both outputs are open drain, no direction control is needed. The opposite side of the reference transistor (S_REF)
is connected to the processor core power supply voltage. When D_REF is connected through a 200 kΩ resistor to a 3.3 V to 5.5 V V_CC supply
and S_REF is set between1.0 V to V_CC - 1.5 V, the output of each Sn has a maximum output voltage equal to S_REF and the output of each Dn
has a maximum output voltage equal to V_CC.
1.8 V
1.5 V
1.2 V
1.0 V
V_CORE
CPU I/O
TYPICAL BI-DIRECTIONAL VOLTAGE TRANSLATION
GTL2002
GND G_REF
S_{REF DREF}
S1
D1
S2
D2
200 KΩ
5V
TOTEM POLE OR
OPEN DRAIN I/O
V_CC
CHIPSET I/O
INCREASE BIT
SIZE BY USING
10 BIT GTL2010 OR
22 BIT GTL2000
S3
D3
S4
D4
S5
D5
Sn
Dn
3.3 V
V_CC
CHIPSET I/O
Figure 1. Bi-directional translation to multiple higher voltage levels such as an I²C bus application
SA00642
2003 Apr 01
4