BUK543-60A Datasheet, PDF (4/8 Pages) NXP Semiconductors – PowerMOS transistor Logic level FET

Philips Semiconductors
PowerMOS transistor
Logic level FET
ID / A
40
10
7
30
BUK553-50A
VGS / V =
5
20
4
10
3
0
0
2
4
6
8
10
VDS / V
Fig.5. Typical output characteristics, T_j = 25 ˚C.
I_D = f(V_DS); parameter V_GS
RDS(ON) / Ohm
0.5
0.4
2.5 3
3.5
0.3
VGS / V =
4
4.5
BUK553-50A
5
0.2
0.1
7
0
0
Fig.6.
10
10
20
30
40
ID / A
Typical on-state resistance, T_j = 25 ˚C.
R_DS(ON) = f(I_D); parameter V_GS
ID / A
40
30
BUK553-50A
Tj / C =
25
150
20
10
0
0
2
4
6
8
VGS / V
Fig.7. Typical transfer characteristics.
I_D = f(V_GS) ; conditions: V_DS = 25 V; parameter T_j
Product Specification
BUK543-60A/B
gfs / S
10
BUK 553-50A
9
8
7
6
5
4
3
2
1
0
0
10
20
30
40
ID / A
Fig.8. Typical transconductance, T_j = 25 ˚C.
g_fs = f(I_D); conditions: V_DS = 25 V
a
1.5
Normalised RDS(ON) = f(Tj)
1.0
0.5
0
-60 -40 -20 0 20 40 60 80 100 120 140
Tj / C
Fig.9. Normalised drain-source on-state resistance.
a = R_DS(ON)/R_{DS(ON)25 ˚C} = f(T_j); I_D = 10 A; V_GS = 5 V
VGS(TO) / V
2
1
max.
typ.
min.
0
-60 -40 -20 0
20 40 60 80 100 120 140
Tj / C
Fig.10. Gate threshold voltage.
V_GS(TO) = f(T_j); conditions: I_D = 1 mA; V_DS = V_GS
April 1993
4
Rev 1.100