BUJ304A Datasheet, PDF (4/7 Pages) NXP Semiconductors – Silicon Diffused Power Transistor

Philips Semiconductors
Silicon Diffused Power Transistor
Product specification
BUJ304A
120 ^%
110
Normalised Derating
with heatsink compound
100
90
80
70
60
P _tot
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Ths / C
Fig.7. Normalised power dissipation.
PD% = 100⋅PD/PD _25˚C = f (T_hs)
hfe
100
5V
10
1V
1
0.01
Fig.8.
0.1
1
IC/A
10
Typical DC current gain. h_FE = f(I_C)
parameter V_CE
VCEsat/V
2.0
1.6
IICC==11AA
2A 3A 4A
1.2
0.8
0.4
0.0
0.01
0.10
IB/A
1.00
10.00
Fig.9. Collector-Emitter saturation voltage.
Solid lines = typ values, V_CEsat = f(IB); T_j=25˚C.
VBEsat/V
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0.1
1
10
IC/A
Fig.10. Base-Emitter saturation voltage.
Solid lines = typ values, V_BEsat = f(IC); at IC/IB =4.
VCEsat/V
0.5
0.4
0.3
0.2
0.1
0.0
0.1
1
10
IC/A
Fig.11. Collector-Emitter saturation voltage.
Solid lines = typ values, V_CEsat = f(IC); at IC/IB =4.
Zth / (K/W)
10
1
D= 0.5
0.2
0.1
0.1 ^0.05
0.02
0
P_D
tp
tp
D= _T
T
t
0.01
1E-06
1E-04
1E-02
t/s
1E+00
Fig.12. Transient thermal impedance.
Z_{th j-hs} = f(t); parameter D = t_p/T
March 1999
4
Rev 1.000