BU2532AW Datasheet, PDF (4/6 Pages) NXP Semiconductors – Silicon Diffused Power Transistor

Philips Semiconductors
Silicon Diffused Power Transistor
Initial specification
BU2532AW
VBEsat / V
1
IC = 9 A
0.9
BU2530/2AL
0.8
IC = 7 A
0.7
Tj = 85 C
Tj = 25 C
0.6
0
Fig.7.
1
2
3
4
IB / A
Typical base-emitter saturation voltage.
V_BEsat = f (I_B); parameter I_C
120 ^PD%
Normalised Power Derating
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Tmb / C
Fig.8. Normalised power dissipation.
PD% = 100⋅P_D/P_{D 25˚C} = f (T_mb)
Zth / (K/W)
10
BU2525A
1
0.5
0.2
0.1
0.1
0.05
0.02
0.01
P_D
tp
D
=
tp
T
D=0
0.001
1E-06
1E-04
1E-02
t/s
T
t
1E+00
Fig.9. Transient thermal impedance.
Z_{th j-mb} = f(t); parameter D = t_p/T
VCC
IBend
-VBB
LC
LB
T.U.T.
VCL
CFB
Fig.10. Test Circuit RBSOA. V_CC = 150 V;
-V_BB = 1 - 5 V;
L_C = 1.5 mH; V_CL = 1450 V; L_B = 0.3 - 2 µH;
C_FB = 1 - 10 nF; I_B(end) = 1.0 - 2.0 A
IC / A
40
BU2530/32AL
30
Area where
fails occur
20
10
0
100
VCE / V
1000 1500
Fig.11. Reverse bias safe operating area. T_j ≤ T_jmax
September 1997
4
Rev 1.000