74HC4060 Datasheet, PDF (4/12 Pages) NXP Semiconductors – 14-stage binary ripple counter with oscillator

Philips Semiconductors
14-stage binary ripple counter with oscillator
Product specification
74HC/HCT4060
DYNAMIC POWER DISSIPATION FOR 74HC
PARAMETER
total dynamic power
dissipation when using the
on-chip oscillator (P_D)
Note
1. GND = 0 V; T_amb = 25 °C
V_CC (V)
2.0
4.5
6.0
TYPICAL FORMULA FOR P_D (µW) (note 1)
C_PD × f_osc × V_CC2 + ∑ (C_L × V_CC2 × f_o) + 2C_t × V_CC2 × f_osc + 60 × V_CC
C_PD × f_osc × V_CC2 + ∑ (C_L × V_CC2 × f_o) + 2C_t × V_CC2 × f_osc + 1 750 × V_CC
C_PD × f_osc × V_CC2 + ∑ (C_L × V_CC2 × f_o) + 2C_t × V_CC2 × f_osc + 3 800 × V_CC
DYNAMIC POWER DISSIPATION FOR 74HCT
PARAMETER
total dynamic power
dissipation when using the
on-chip oscillator (P_D)
V_CC (V) TYPICAL FORMULA FOR P_D (µW) (note 1)
4.5
C_PD × f_osc × V_CC2 + ∑ (C_L × V_CC2 × f_o) + 2C_t × V_CC2 × f_osc + 1 750 × V_CC
Notes
1. GND = 0 V; T_amb = 25 °C
2. Where: f_o = output frequency in MHz
f_osc = oscillator frequency in MHz
∑ (C_L × V_CC2 × f_o) = sum of outputs
C_L = output load capacitance in pF
C_t = timing capacitance in pF
V_CC = supply voltage in V
APPLICATIONS
• Control counters
• Timers
• Frequency dividers
• Time-delay circuits
December 1990
Fig.4 Functional diagram.
4